summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/emev2.dtsi
blob: 9063a4434d6a59b26e3bac76e24f1643bc6121e8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
/*
 * Device Tree Source for the EMEV2 SoC
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

/ {
	compatible = "renesas,emev2";
	interrupt-parent = <&gic>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};
		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	gic: interrupt-controller@e0020000 {
		compatible = "arm,cortex-a9-gic";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0xe0028000 0x1000>,
		      <0xe0020000 0x0100>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0 120 4>,
			     <0 121 4>;
	};

	sti@e0180000 {
		compatible = "renesas,em-sti";
		reg = <0xe0180000 0x54>;
		interrupts = <0 125 0>;
	};

	uart@e1020000 {
		compatible = "renesas,em-uart";
		reg = <0xe1020000 0x38>;
		interrupts = <0 8 0>;
	};

	uart@e1030000 {
		compatible = "renesas,em-uart";
		reg = <0xe1030000 0x38>;
		interrupts = <0 9 0>;
	};

	uart@e1040000 {
		compatible = "renesas,em-uart";
		reg = <0xe1040000 0x38>;
		interrupts = <0 10 0>;
	};

	uart@e1050000 {
		compatible = "renesas,em-uart";
		reg = <0xe1050000 0x38>;
		interrupts = <0 11 0>;
	};

	gpio0: gpio@e0050000 {
		compatible = "renesas,em-gio";
		reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
		interrupts = <0 67 0>, <0 68 0>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <32>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
	gpio1: gpio@e0050080 {
		compatible = "renesas,em-gio";
		reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
		interrupts = <0 69 0>, <0 70 0>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <32>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
	gpio2: gpio@e0050100 {
		compatible = "renesas,em-gio";
		reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
		interrupts = <0 71 0>, <0 72 0>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <32>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
	gpio3: gpio@e0050180 {
		compatible = "renesas,em-gio";
		reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
		interrupts = <0 73 0>, <0 74 0>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <32>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
	gpio4: gpio@e0050200 {
		compatible = "renesas,em-gio";
		reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
		interrupts = <0 75 0>, <0 76 0>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <31>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};
};