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/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6q.dtsi"
#include "imx6qdl-sabrelite.dtsi"
/ {
model = "Freescale i.MX6 Quad SABRE Lite Board";
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
};
&mxcfb1 {
status = "okay";
};
&mxcfb2 {
status = "okay";
};
&mxcfb3 {
status = "okay";
};
&mxcfb4 {
status = "okay";
};
&ov5640 {
ipu_id = <1>;
};
&pinctrl_ov5640 { /* parallel camera */
fsl,pins = <
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0xb0b1
MX6QDL_PAD_EIM_A18__IPU2_CSI1_DATA13 0xb0b1
MX6QDL_PAD_EIM_A19__IPU2_CSI1_DATA14 0xb0b1
MX6QDL_PAD_EIM_A20__IPU2_CSI1_DATA15 0xb0b1
MX6QDL_PAD_EIM_A21__IPU2_CSI1_DATA16 0xb0b1
MX6QDL_PAD_EIM_A22__IPU2_CSI1_DATA17 0xb0b1
MX6QDL_PAD_EIM_A23__IPU2_CSI1_DATA18 0xb0b1
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0xb0b1
MX6QDL_PAD_EIM_DA10__IPU2_CSI1_DATA_EN 0xb0b1
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0xb0b1
MX6QDL_PAD_EIM_DA11__IPU2_CSI1_HSYNC 0xb0b1
MX6QDL_PAD_EIM_DA12__IPU2_CSI1_VSYNC 0xb0b1
>;
};
&sata {
status = "okay";
};
&v4l2_cap_2 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <1>;
csi_id = <1>;
mclk_source = <0>;
status = "okay";
};
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