summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx6qp-sabresd.dts
blob: 59636a0bad9f7ac302304af80999d2c71bf064fb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
/*
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include "imx6qp.dtsi"
#include "imx6qdl-sabresd.dtsi"

/ {
	model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
	compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
};

&reg_arm {
	vin-supply = <&sw2_reg>;
};

&iomuxc {
	imx6qdl-sabresd {
		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10071
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
			>;
		};
	};
};

&iomuxc {
	imx6qdl-sabresd {
		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10071
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
			>;
		};
	};
};

&ldb {
	lvds-channel@0 {
		crtc = "ipu2-di0";
	};

	lvds-channel@1 {
		crtc = "ipu2-di1";
	};
};

&mxcfb1 {
	prefetch;
	status = "okay";
};

&mxcfb2 {
	prefetch;
	status = "okay";
};

&mxcfb3 {
	prefetch;
	status = "okay";
};

&mxcfb4 {
	prefetch;
	status = "okay";
};

&ov564x {
	AVDD-supply = <&vgen6_reg>; /* 2.8v */
	DOVDD-supply = <&sw4_reg>; /* 1.8v */
};

&ov564x_mipi {
	AVDD-supply = <&vgen6_reg>; /* 2.8v */
	DOVDD-supply = <&sw4_reg>; /* 1.8v */
};

&pcie {
	pcie-bus-supply = <&vgen3_reg>; /* 1.8v pwr up pcie ext osc on revb */
	reset-gpio = <&gpio7 12 0>;
	status = "okay";
};

&pre1 {
	status = "okay";
};

&pre2 {
	status = "okay";
};

&pre3 {
	status = "okay";
};

&pre4 {
	status = "okay";
};

&prg1 {
	memory-region = <&memory>;
	status = "okay";
};

&prg2 {
	memory-region = <&memory>;
	status = "okay";
};

&sata {
	status = "okay";
};