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// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.
/dts-v1/;
#include "imx6qp.dtsi"
#include "imx6qdl-sabresd.dtsi"
/ {
model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
};
®_arm {
vin-supply = <&sw2_reg>;
};
&iomuxc {
imx6qdl-sabresd {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};
};
&ov564x {
AVDD-supply = <&vgen6_reg>; /* 2.8v */
DOVDD-supply = <&sw4_reg>; /* 1.8v */
};
&ov564x_mipi {
AVDD-supply = <&vgen6_reg>; /* 2.8v */
DOVDD-supply = <&sw4_reg>; /* 1.8v */
};
&pcie {
status = "okay";
};
&sata {
status = "okay";
};
&pre1 {
status = "okay";
};
&pre2 {
status = "okay";
};
&pre3 {
status = "okay";
};
&pre4 {
status = "okay";
};
&prg1 {
memory-region = <&memory>;
status = "okay";
};
&prg2 {
memory-region = <&memory>;
status = "okay";
};
&mxcfb1 {
prefetch;
status = "okay";
};
&mxcfb2 {
prefetch;
status = "okay";
};
&mxcfb3 {
prefetch;
status = "okay";
};
&mxcfb4 {
prefetch;
status = "okay";
};
&ldb {
lvds-channel@0 {
crtc = "ipu2-di0";
};
lvds-channel@1 {
crtc = "ipu2-di1";
};
};
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