blob: e1217f3b04cbf4023a4811a59a14c218654e678e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
/*
* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
/*
* This file is created by xml file. Don't Edit it.
*
* Xml Revision: 1.30
* Template revision: 1.3
*/
#ifndef _SRC_REGISTER_HEADER_
#define _SRC_REGISTER_HEADER_
#define SRC_SCR_OFFSET 0x000
#define SRC_SBMR1_OFFSET 0x004
#define SRC_SRSR_OFFSET 0x008
#define SRC_SECR_OFFSET 0x00c
#define SRC_GPSR_OFFSET 0x010
#define SRC_SISR_OFFSET 0x014
#define SRC_SIMR_OFFSET 0x018
#define SRC_SBMR2_OFFSET 0x01c
#define SRC_GPR0_OFFSET 0x020
#define SRC_GPR1_OFFSET 0x024
#define SRC_GPR2_OFFSET 0x028
#define SRC_GPR3_OFFSET 0x02c
#define SRC_GPR4_OFFSET 0x030
#define SRC_HAB0_OFFSET 0x034
#define SRC_HAB1_OFFSET 0x038
#define SRC_HAB2_OFFSET 0x03c
#define SRC_HAB3_OFFSET 0x040
#define SRC_HAB4_OFFSET 0x044
#define SRC_HAB5_OFFSET 0x048
#define SRC_MISC0_OFFSET 0x04c
#define SRC_MISC1_OFFSET 0x050
#define SRC_MISC2_OFFSET 0x054
#define SRC_MISC3_OFFSET 0x058
#endif
|
