blob: a4ae656e74627037240b3012b9cf490ceecc0148 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
/*
* Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <linux/io.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include <mach/check_fuse.h>
int mxc_fuse_get_gpu_status(void)
{
void __iomem *reg_base = NULL;
u32 reg_val = 0;
int bit_status = 0;
if (cpu_is_mx53() || cpu_is_mx51()) {
reg_base = MX53_IO_ADDRESS(MX53_IIM_BASE_ADDR);
reg_val = readl(reg_base + MXC_IIM_MX5_DISABLERS_OFFSET);
bit_status = (reg_val & MXC_IIM_MX5_DISABLERS_GPU_MASK)
>> MXC_IIM_MX5_DISABLERS_GPU_SHIFT;
} else if (cpu_is_mx50()) {
reg_base = ioremap(MX50_OCOTP_CTRL_BASE_ADDR, SZ_8K);
reg_val = readl(reg_base + FSL_OCOTP_MX5_CFG2_OFFSET);
bit_status = (reg_val & FSL_OCOTP_MX5_DISABLERS_GPU_MASK)
>> FSL_OCOTP_MX5_DISABLERS_GPU_SHIFT;
}
return (1 == bit_status);
}
EXPORT_SYMBOL(mxc_fuse_get_gpu_status);
int mxc_fuse_get_vpu_status(void)
{
void __iomem *reg_base = NULL;
u32 reg_val = 0;
int bit_status = 0;
if (cpu_is_mx53()) {
reg_base = MX53_IO_ADDRESS(MX53_IIM_BASE_ADDR);
reg_val = readl(reg_base + MXC_IIM_MX5_DISABLERS_OFFSET);
bit_status = (reg_val & MXC_IIM_MX5_DISABLERS_VPU_MASK)
>> MXC_IIM_MX5_DISABLERS_VPU_SHIFT;
}
return (1 == bit_status);
}
EXPORT_SYMBOL(mxc_fuse_get_vpu_status);
|
