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/*
* arch/arm/mach-tegra/cpuidle-t2.c
*
* CPU idle driver for Tegra2 CPUs
*
* Copyright (c) 2010-2011, NVIDIA Corporation.
* Copyright (c) 2011 Google, Inc.
* Author: Colin Cross <ccross@android.com>
* Gary King <gking@nvidia.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#include <linux/kernel.h>
#include <linux/cpu.h>
#include <linux/cpuidle.h>
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/sched.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/smp.h>
#include <linux/suspend.h>
#include <linux/tick.h>
#include <asm/cpu_pm.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include "cpuidle.h"
#include "pm.h"
#include "sleep.h"
static struct {
unsigned int cpu_ready_count[2];
unsigned long long cpu_wants_lp2_time[2];
unsigned long long in_lp2_time;
unsigned int both_idle_count;
unsigned int tear_down_count;
unsigned int lp2_count;
unsigned int lp2_count_bin[32];
unsigned int lp2_int_count[NR_IRQS];
unsigned int last_lp2_int_count[NR_IRQS];
} idle_stats;
#ifdef CONFIG_SMP
static void __iomem *clk_rst = IO_ADDRESS(TEGRA_CLK_RESET_BASE);
static void __iomem *evp_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100;
static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
static int tegra2_reset_sleeping_cpu(int cpu)
{
int ret = 0;
BUG_ON(cpu == smp_processor_id());
tegra_pen_lock();
if (readl(pmc + PMC_SCRATCH41) == CPU_RESETTABLE)
tegra2_cpu_reset(cpu);
else
ret = -EINVAL;
tegra_pen_unlock();
return ret;
}
static void tegra2_wake_reset_cpu(int cpu)
{
u32 reg;
writel(virt_to_phys(tegra_secondary_resume), evp_reset);
/* enable cpu clock on cpu */
reg = readl(clk_rst + 0x4c);
writel(reg & ~(1 << (8 + cpu)), clk_rst + 0x4c);
reg = 0x1111 << cpu;
writel(reg, clk_rst + 0x344);
/* unhalt the cpu */
flowctrl_writel(0, FLOW_CTRL_HALT_CPU(1));
}
static int tegra2_reset_other_cpus(int cpu)
{
int i;
int abort = -1;
for_each_online_cpu(i) {
if (i != cpu) {
if (tegra2_reset_sleeping_cpu(i)) {
abort = i;
break;
}
}
}
if (abort >= 0) {
for_each_online_cpu(i) {
if (i != cpu && i < abort)
tegra2_wake_reset_cpu(i);
}
return -EINVAL;
}
return 0;
}
#else
static void tegra2_wake_reset_cpu(int cpu)
{
}
static int tegra2_reset_other_cpus(int cpu)
{
return 0;
}
#endif
static int tegra2_idle_lp2_last(struct cpuidle_device *dev,
struct cpuidle_state *state, s64 request)
{
int i;
while (tegra2_cpu_is_resettable_soon())
cpu_relax();
if (tegra2_reset_other_cpus(dev->cpu))
return -EBUSY;
tegra_idle_lp2_last(request, 0);
for_each_online_cpu(i) {
if (i != dev->cpu) {
tegra2_wake_reset_cpu(i);
tegra_clear_cpu_in_lp2(i);
}
}
return 0;
}
void tegra2_idle_lp2(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
s64 request = ktime_to_us(tick_nohz_get_sleep_length());
bool last_cpu = tegra_set_cpu_in_lp2(dev->cpu);
cpu_pm_enter();
if (last_cpu) {
if (tegra2_idle_lp2_last(dev, state, request) < 0) {
int i;
for_each_online_cpu(i) {
if (i != dev->cpu) {
tegra2_wake_reset_cpu(i);
tegra_clear_cpu_in_lp2(i);
}
}
}
} else
tegra2_sleep_wfi(PLAT_PHYS_OFFSET - PAGE_OFFSET);
cpu_pm_exit();
tegra_clear_cpu_in_lp2(dev->cpu);
}
void tegra2_cpu_idle_stats_lp2_ready(unsigned int cpu)
{
idle_stats.cpu_ready_count[cpu]++;
}
void tegra2_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us)
{
idle_stats.cpu_wants_lp2_time[cpu] += us;
}
#ifdef CONFIG_DEBUG_FS
int tegra2_lp2_debug_show(struct seq_file *s, void *data)
{
int bin;
int i;
seq_printf(s, " cpu0 cpu1\n");
seq_printf(s, "-------------------------------------------------\n");
seq_printf(s, "cpu ready: %8u %8u\n",
idle_stats.cpu_ready_count[0],
idle_stats.cpu_ready_count[1]);
seq_printf(s, "both idle: %8u %7u%% %7u%%\n",
idle_stats.both_idle_count,
idle_stats.both_idle_count * 100 /
(idle_stats.cpu_ready_count[0] ?: 1),
idle_stats.both_idle_count * 100 /
(idle_stats.cpu_ready_count[1] ?: 1));
seq_printf(s, "tear down: %8u %7u%%\n", idle_stats.tear_down_count,
idle_stats.tear_down_count * 100 /
(idle_stats.both_idle_count ?: 1));
seq_printf(s, "lp2: %8u %7u%%\n", idle_stats.lp2_count,
idle_stats.lp2_count * 100 /
(idle_stats.both_idle_count ?: 1));
seq_printf(s, "\n");
seq_printf(s, "cpu ready time: %8llu %8llu ms\n",
div64_u64(idle_stats.cpu_wants_lp2_time[0], 1000),
div64_u64(idle_stats.cpu_wants_lp2_time[1], 1000));
seq_printf(s, "lp2 time: %8llu ms %7d%% %7d%%\n",
div64_u64(idle_stats.in_lp2_time, 1000),
(int)div64_u64(idle_stats.in_lp2_time * 100,
idle_stats.cpu_wants_lp2_time[0] ?: 1),
(int)div64_u64(idle_stats.in_lp2_time * 100,
idle_stats.cpu_wants_lp2_time[1] ?: 1));
seq_printf(s, "\n");
seq_printf(s, "%19s %8s\n", "", "lp2");
seq_printf(s, "-------------------------------------------------\n");
for (bin = 0; bin < 32; bin++) {
if (idle_stats.lp2_count_bin[bin] == 0)
continue;
seq_printf(s, "%6u - %6u ms: %8u\n",
1 << (bin - 1), 1 << bin,
idle_stats.lp2_count_bin[bin]);
}
seq_printf(s, "\n");
seq_printf(s, "%3s %20s %6s %10s\n",
"int", "name", "count", "last count");
seq_printf(s, "--------------------------------------------\n");
for (i = 0; i < NR_IRQS; i++) {
if (idle_stats.lp2_int_count[i] == 0)
continue;
seq_printf(s, "%3d %20s %6d %10d\n",
i, irq_to_desc(i)->action ?
irq_to_desc(i)->action->name ?: "???" : "???",
idle_stats.lp2_int_count[i],
idle_stats.lp2_int_count[i] -
idle_stats.last_lp2_int_count[i]);
idle_stats.last_lp2_int_count[i] = idle_stats.lp2_int_count[i];
};
return 0;
}
#endif
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