1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
|
/*
* Copyright (C) 2010 Google, Inc.
* Copyright (C) 2011-2012 NVIDIA Corp.
*
* Author:
* Colin Cross <ccross@google.com>
* Erik Gilling <konkers@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MACH_TEGRA_HARDWARE_H
#define MACH_TEGRA_HARDWARE_H
#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
#define pcibios_assign_all_busses() 1
#else
#define pcibios_assign_all_busses() 0
#endif
enum tegra_chipid {
TEGRA_CHIPID_UNKNOWN = 0,
TEGRA_CHIPID_TEGRA2 = 0x20,
TEGRA_CHIPID_TEGRA3 = 0x30,
TEGRA_CHIPID_TEGRA11 = 0x35,
};
enum tegra_revision {
TEGRA_REVISION_UNKNOWN = 0,
TEGRA_REVISION_A01,
TEGRA_REVISION_A02,
TEGRA_REVISION_A03,
TEGRA_REVISION_A03p,
TEGRA_REVISION_A04,
TEGRA_REVISION_A04p,
TEGRA_REVISION_QT,
TEGRA_REVISION_MAX,
};
extern enum tegra_revision tegra_revision;
enum tegra_chipid tegra_get_chipid(void);
#ifndef CONFIG_TEGRA_SILICON_PLATFORM
void tegra_get_netlist_revision(u32 *netlist, u32* patchid);
#else
static inline void tegra_get_netlist_revision(u32 *netlist, u32* patchid)
{
BUG();
}
#endif
#endif
|
