summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
blob: 3e1782fc8413fa5b2abd2e549f797978f227e31c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2018 NXP
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "fsl-imx8dxp.dtsi"

/ {
	model = "Freescale i.MX8QXP";
	compatible = "fsl,imx8qxp";

	cpus {
		A35_2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a35";
			reg = <0x0 0x2>;
			enable-method = "psci";
			next-level-cache = <&A35_L2>;
		};

		A35_3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a35";
			reg = <0x0 0x3>;
			enable-method = "psci";
			next-level-cache = <&A35_L2>;
		};
	};

	pmu {
		interrupt-affinity = <&A35_0>, <&A35_1>, <&A35_2>, <&A35_3>;
	};

	mu_seco2: mu@31560000 {
		status = "okay";
	};

	mu_seco3: mu@31570000 {
		status = "okay";
	};

	mu_seco4: mu@31580000 {
		status = "okay";
	};
};

&A35_2 {
        device_type = "cpu";
};

&A35_3 {
        device_type = "cpu";
};