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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 NXP.
*/
#include "imx8mm-evk.dts"
/ {
ext_osc_22m: ext-osc-22m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22579200>;
clock-output-names = "sclk0";
};
ext_osc_24m: ext-osc-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
clock-output-names = "sclk1";
};
reg_3v3_vext: regulator-3v3-vext {
compatible = "regulator-fixed";
regulator-name = "3V3_VEXT";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
sound-ak4458 {
status = "disabled";
};
sound-micfil {
status = "disabled";
};
sound-pcm512x {
compatible = "fsl,imx-audio-pcm512x";
model = "pcm512x-audio";
audio-cpu = <&sai5>;
audio-codec = <&pcm512x>;
format = "i2s";
audio-widgets =
"Line", "Left Line Out Jack",
"Line", "Right Line Out Jack";
audio-routing =
"Left Line Out Jack", "OUTL",
"Right Line Out Jack", "OUTR";
bitclock-master = <&pcm512x>;
frame-master = <&pcm512x>;
dac,24db_digital_gain;
dac,led_status;
};
};
&i2c3 {
ak4458_1: ak4458@10 {
status = "disabled";
};
ak4458_2: ak4458@12 {
status = "disabled";
};
ak5558: ak5558@13 {
status = "disabled";
};
ak4497: ak4497@11 {
status = "disabled";
};
pcm512x: pcm512x@4d {
compatible = "ti,pcm5122";
reg = <0x4d>;
AVDD-supply = <®_3v3_vext>;
DVDD-supply = <®_3v3_vext>;
CPVDD-supply = <®_3v3_vext>;
clocks = <&ext_osc_22m>, <&ext_osc_24m>;
clock-names = "sclk0", "sclk1";
};
};
&iomuxc {
pinctrl_sai5: sai5grp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6
>;
};
};
&micfil {
status = "disabled";
};
&sai5 {
status = "okay";
};
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