1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
|
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 NXP.
*/
#include "imx8mp-evk.dts"
/ {
reg_3v3_vext: regulator-3v3-vext {
compatible = "regulator-fixed";
regulator-name = "3V3_VEXT";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
sound-micfil {
status = "disabled";
};
sound-pcm512x {
compatible = "fsl,imx-audio-pcm512x";
model = "pcm512x-audio";
audio-widgets =
"Line", "Left Line Out Jack",
"Line", "Right Line Out Jack";
audio-routing =
"Left Line Out Jack", "OUTL",
"Right Line Out Jack", "OUTR";
dac,24db_digital_gain;
pri-dai-link {
link-name = "pcm512x-hifi";
format = "i2s";
cpu {
sound-dai = <&sai5>;
};
codec {
sound-dai = <&pcm512x>;
};
};
};
};
&i2c3 {
pcm512x: pcm512x@4c {
compatible = "ti,pcm5122";
reg = <0x4c>;
AVDD-supply = <®_3v3_vext>;
DVDD-supply = <®_3v3_vext>;
CPVDD-supply = <®_3v3_vext>;
#sound-dai-cells = <0>;
};
};
&iomuxc {
pinctrl_sai5: sai5grp {
fsl,pins = <
MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_SAI5_RX_DATA00 0xd6
>;
};
};
&micfil {
status = "disabled";
};
&sai5 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai5>;
assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI5_IPG>, <&clk IMX8MP_CLK_DUMMY>,
<&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI5_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
<&clk IMX8MP_CLK_DUMMY>, <&clk IMX8MP_AUDIO_PLL1_OUT>,
<&clk IMX8MP_AUDIO_PLL2_OUT>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
status = "okay";
};
|