arch/arm64/boot/dts/freescale/imx8qm-mek-usdhc3-m2.dts


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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright 2020 NXP
 */
#include "imx8qm-mek-rpmsg.dts"

/ {
	reg_usdhc3_vmmc: usdhc3-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "SD3_SPWR";
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
		power-domains = <&pd IMX_SC_R_BOARD_R3>;
	};
};

&epdev_on {
	regulator-always-on;
};

&iomuxc {
	pinctrl_usdhc3_gpio: usdhc3grpgpio {
		fsl,pins = <
			IMX8QM_USDHC2_VSELECT_LSIO_GPIO4_IO10	0x00000021
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK         0x06000041
			IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD         0x00000021
			IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0     0x00000021
			IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1     0x00000021
			IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2     0x00000021
			IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3     0x00000021
		>;
	};
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>,<&pinctrl_usdhc3_gpio>;
	pinctrl-1 = <&pinctrl_usdhc3>,<&pinctrl_usdhc3_gpio>;
	pinctrl-2 = <&pinctrl_usdhc3>,<&pinctrl_usdhc3_gpio>;
	bus-width = <4>;
	pinctrl-assert-gpios = <&lsio_gpio4 10 GPIO_ACTIVE_HIGH>;
	pm-ignore-notify;
	keep-power-in-suspend;
	non-removable;
	cap-power-off-card;
	vmmc-supply = <&reg_usdhc3_vmmc>;
	status = "okay";
};