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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 NXP
*/
&usdhc1 {
/delete-property/ iommus;
};
&usdhc2 {
/delete-property/ iommus;
};
&usdhc3 {
/delete-property/ iommus;
};
&fec1 {
/delete-property/ iommus;
};
&fec2 {
/delete-property/ iommus;
};
&sata {
/delete-property/ iommus;
};
&sata {
/delete-property/ iommus;
};
&usbotg3 {
/delete-property/ iommus;
};
&smmu {
/* xen only supports legacy bindings for now */
#iommu-cells = <0>;
};
&dpu1 {
fsl,sc_rsrc_id = <IMX_SC_R_DC_0_BLIT0>,
<IMX_SC_R_DC_0_BLIT1>,
<IMX_SC_R_DC_0_BLIT2>,
<IMX_SC_R_DC_0_BLIT_OUT>,
<IMX_SC_R_DC_0_WARP>,
<IMX_SC_R_DC_0_VIDEO0>,
<IMX_SC_R_DC_0_VIDEO1>,
<IMX_SC_R_DC_0_FRAC0>,
<IMX_SC_R_DC_0>;
};
&dpu2 {
fsl,sc_rsrc_id = <IMX_SC_R_DC_1_BLIT0>,
<IMX_SC_R_DC_1_BLIT1>,
<IMX_SC_R_DC_1_BLIT2>,
<IMX_SC_R_DC_1_BLIT_OUT>,
<IMX_SC_R_DC_1_WARP>,
<IMX_SC_R_DC_1_VIDEO0>,
<IMX_SC_R_DC_1_VIDEO1>,
<IMX_SC_R_DC_1_FRAC0>,
<IMX_SC_R_DC_1>;
};
|
