summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand/mxc_nd2.h
blob: de661a674d02b2fb46abd6917323d249285cf723 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
/*
 * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
 */

/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/*!
 * @file mxc_nd2.h
 *
 * @brief This file contains the NAND Flash Controller register information.
 *
 *
 * @ingroup NAND_MTD
 */

#ifndef __MXC_ND2_H__
#define __MXC_ND2_H__

#include <asm/hardware.h>

#define IS_2K_PAGE_NAND		(mtd->writesize == NAND_PAGESIZE_2KB)
#define IS_4K_PAGE_NAND		(mtd->writesize == NAND_PAGESIZE_4KB)
#define NAND_PAGESIZE_2KB	2048
#define NAND_PAGESIZE_4KB	4096
#define IS_LARGE_PAGE_NAND	(mtd->writesize > 512)

#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3
/*
 * For V3 NFC registers Definition
 */
/* AXI Bus Mapped */
#define NFC_AXI_BASE_ADDR		NFC_BASE_ADDR_AXI

#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1
#define MXC_INT_NANDFC			MXC_INT_EMI
#define NFC_FLASH_ADDR_CMD		(nfc_axi_base + 0x1E00)
#define NFC_CONFIG1			(nfc_axi_base + 0x1E04)
#define NFC_ECC_STATUS_RESULT		(nfc_axi_base + 0x1E08)
#define LAUNCH_NFC			(nfc_axi_base + 0x1E0c)
#define NFC_WRPROT			(nfc_ip_base + 0x00)
#define NFC_WRPROT_UNLOCK_BLK_ADD0	(nfc_ip_base + 0x04)
#define NFC_WRPROT_UNLOCK_BLK_ADD1	(nfc_ip_base + 0x08)
#define NFC_WRPROT_UNLOCK_BLK_ADD2	(nfc_ip_base + 0x0c)
#define NFC_WRPROT_UNLOCK_BLK_ADD3	(nfc_ip_base + 0x10)
#define NFC_CONFIG2			(nfc_ip_base + 0x14)
#define NFC_IPC				(nfc_ip_base + 0x18)
#define NFC_AXI_ERR_ADD			(nfc_ip_base + 0x1c)
#else
#define NFC_FLASH_ADDR_CMD		(nfc_axi_base + 0xE00)
#define NFC_CONFIG1			(nfc_axi_base + 0xE04)
#define NFC_ECC_STATUS_RESULT		(nfc_axi_base + 0xE08)
#define LAUNCH_NFC			(nfc_axi_base + 0xE0C)

/* IP Bus Mapped */
#define NFC_WRPROT			(nfc_ip_base + 0x00)
#define NFC_WRPROT_UNLOCK_BLK_ADD0	(nfc_ip_base + 0x04)
#define NFC_WRPROT_UNLOCK_BLK_ADD1	(nfc_ip_base + 0x08)
#define NFC_WRPROT_UNLOCK_BLK_ADD2	(nfc_ip_base + 0x0C)
#define NFC_WRPROT_UNLOCK_BLK_ADD3	(nfc_ip_base + 0x10)
#define NFC_CONFIG2			(nfc_ip_base + 0x14)
#define NFC_IPC				(nfc_ip_base + 0x18)
#define NFC_AXI_ERR_ADD			(nfc_ip_base + 0x1C)
#endif
/*!
 * Addresses for NFC RAM BUFFER Main area 0
 */
#define MAIN_AREA0        		((volatile u16 *)(nfc_axi_base + 0x000))
#define MAIN_AREA1        		((volatile u16 *)(nfc_axi_base + 0x200))
#define MAIN_AREA2        		((volatile u16 *)(nfc_axi_base + 0x400))
#define MAIN_AREA3        		((volatile u16 *)(nfc_axi_base + 0x600))

#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1
#define MAIN_AREA4        		((volatile u16 *)(nfc_axi_base + 0x800))
#define MAIN_AREA5        		((volatile u16 *)(nfc_axi_base + 0xa00))
#define MAIN_AREA6        		((volatile u16 *)(nfc_axi_base + 0xc00))
#define MAIN_AREA7        		((volatile u16 *)(nfc_axi_base + 0xe00))

/*!
 * Addresses for NFC SPARE BUFFER Spare area 0
 */
#define SPARE_AREA0       		((volatile u16 *)(nfc_axi_base + 0x1000))
#define SPARE_AREA1       		((volatile u16 *)(nfc_axi_base + 0x1040))
#define SPARE_AREA2       		((volatile u16 *)(nfc_axi_base + 0x1080))
#define SPARE_AREA3       		((volatile u16 *)(nfc_axi_base + 0x10c0))
#define SPARE_AREA4       		((volatile u16 *)(nfc_axi_base + 0x1100))
#define SPARE_AREA5       		((volatile u16 *)(nfc_axi_base + 0x1140))
#define SPARE_AREA6       		((volatile u16 *)(nfc_axi_base + 0x1180))
#define SPARE_AREA7       		((volatile u16 *)(nfc_axi_base + 0x11c0))
#define SPARE_LEN			64
#define SPARE_COUNT			8
#define SPARE_SIZE			(SPARE_LEN * SPARE_COUNT)
#else
#define SPARE_AREA0       		((volatile u16 *)(nfc_axi_base + 0x800))
#define SPARE_AREA1       		((volatile u16 *)(nfc_axi_base + 0x810))
#define SPARE_AREA2       		((volatile u16 *)(nfc_axi_base + 0x820))
#define SPARE_AREA3       		((volatile u16 *)(nfc_axi_base + 0x830))
#define SPARE_LEN			16
#define SPARE_COUNT			4
#define SPARE_SIZE			(SPARE_LEN * SPARE_COUNT)
#endif

#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1
#define SPAS_MASK			0xFF00FFFF
#define IS_4BIT_ECC			\
	((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6)
/* Dummy define for compilation. Not used */
#define BAD_BLK_MARKER_MA		0
/* Dummy define for compilation. Not used */
#define BAD_BLK_MARKER_SP		0

#define SET_SPAS(v)			\
	raw_write(((raw_read(NFC_CONFIG2) & SPAS_MASK) | ((v) << 16)), NFC_CONFIG2)

#define SET_ECC_MODE(v ) 		 	\
	do {					\
		if ((v) == NFC_SPAS_218)  {	\
			raw_write((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_8) , NFC_CONFIG2);	\
		}else{				\
			raw_write((raw_read(NFC_CONFIG2) | NFC_ECC_MODE_4) , NFC_CONFIG2);	\
		}				\
	} while(0)

#define WRITE_NFC_IP_REG(val,reg) 			\
	do {	 					\
		raw_write(NFC_IPC_CREQ, NFC_IPC);	\
		while(!((*(volatile u32*)NFC_IPC & NFC_IPC_ACK)>>1));\
		raw_write(val, reg);			\
		raw_write(0, NFC_IPC);			\
	} while(0)

#define SET_NFMS(v)

#else
#define IS_4BIT_ECC			1
#define SET_SPAS(v)
#define SET_ECC_MODE(v)
#define SET_NFMS(v)	(NFMS |= (v));

#define WRITE_NFC_IP_REG(val,reg) \
	raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT),  REG_NFC_OPS_STAT)

#endif

/*!
 * Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for
 * Specific operation
 */
#define NFC_CMD            		0x1
#define NFC_ADDR           		0x2
#define NFC_INPUT          		0x4
#define NFC_OUTPUT         		0x8
#define NFC_ID             		0x10
#define NFC_STATUS         		0x20

/* Bit Definitions */
#define NFC_OPS_STAT			(1 << 31)
#define NFC_INT_MSK			(1 << 4)
#define NFC_BIG				(1 << 5)
#define NFC_FLASH_ADDR_SHIFT		16
#define NFC_UNLOCK_END_ADDR_SHIFT	16
#define RBA_BUFFER0			(0 << 4)
#define RBA_BUFFER1			(1 << 4)
#define RBA_BUFFER2			(2 << 4)
#define RBA_BUFFER3			(3 << 4)
#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1
#define RBA_BUFFER4			(4 << 4)
#define RBA_BUFFER5			(5 << 4)
#define RBA_BUFFER6			(6 << 4)
#define RBA_BUFFER7 			(7 << 4)
#define RBA_RESET			~(7 << 4)
#else
#define RBA_RESET			~(3 << 4)
#endif
#define NFC_RB				(1 << 29)
#define NFC_ECC_EN			(1 << 3)
#define NFC_CE				(1 << 1)
#define NFC_RST				(1 << 2)
#define NFC_PPB_32			(0 << 7)
#define NFC_PPB_64			(1 << 7)
#define NFC_PPB_128			(2 << 7)
#define NFC_PPB_256			(3 << 7)
#define NFC_PPB_RESET			~(3 << 7)
#define NFC_SP_EN			1
#define NFC_BLS_LOCKED			(0 << 16)
#define NFC_BLS_LOCKED_DEFAULT		(1 << 16)
#define NFC_BLS_UNLCOKED		(2 << 16)
#define NFC_BLS_RESET			~(3 << 16)
#define NFC_WPC_LOCK_TIGHT		1
#define NFC_WPC_LOCK			(1 << 1)
#define NFC_WPC_UNLOCK			(1 << 2)
#define NFC_WPC_RESET			~(7)
#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1
#define NFC_ECC_MODE_4    		(1 << 6)
#define NFC_ECC_MODE_8			~(1 << 6)
#define NFC_SPAS_16			16
#define NFC_SPAS_64			64
#define NFC_SPAS_128			128
#define NFC_SPAS_218			218
#define NFC_IPC_CREQ			(1 << 0)
#define NFC_IPC_ACK			(1 << 1)
#endif
/* NFC Register Mapping */
#define REG_NFC_OPS_STAT		NFC_IPC
#define REG_NFC_INTRRUPT		NFC_CONFIG2
#define REG_NFC_FLASH_ADDR		NFC_FLASH_ADDR_CMD
#define REG_NFC_FLASH_CMD		NFC_FLASH_ADDR_CMD
#define REG_NFC_OPS			LAUNCH_NFC
#define REG_NFC_SET_RBA			NFC_CONFIG1
#define REG_NFC_RB			NFC_IPC
#define REG_NFC_ECC_EN			NFC_CONFIG2
#define REG_NFC_ECC_STATUS_RESULT	NFC_ECC_STATUS_RESULT
#define REG_NFC_CE			NFC_CONFIG1
#define REG_NFC_RST			NFC_CONFIG1
#define REG_NFC_PPB			NFC_CONFIG2
#define REG_NFC_SP_EN			NFC_CONFIG1
#define REG_NFC_BLS			NFC_WRPROT
#define REG_UNLOCK_BLK_ADD0		NFC_WRPROT_UNLOCK_BLK_ADD0
#define REG_UNLOCK_BLK_ADD1		NFC_WRPROT_UNLOCK_BLK_ADD1
#define REG_UNLOCK_BLK_ADD2		NFC_WRPROT_UNLOCK_BLK_ADD2
#define REG_UNLOCK_BLK_ADD3		NFC_WRPROT_UNLOCK_BLK_ADD3
#define REG_NFC_WPC			NFC_WRPROT

/* NFC V3 Specific MACRO functions definitions */
#define raw_write(v,a)		__raw_writel(v,a)
#define raw_read(a)		__raw_readl(a)

/* Explcit ack ops status (if any), before issue of any command  */
#define ACK_OPS         	raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), REG_NFC_OPS_STAT);

/* NFC buffer 0 to 3 are used for page read/write, starting with buffer0 */
/* Set RBA bits for BUFFER0 */
#define NFC_SET_RBA(val, buf_id)       \
	val = ((raw_read(REG_NFC_SET_RBA) & RBA_RESET) | buf_id);

#define UNLOCK_ADDR(start_addr,end_addr)     \
	raw_write(start_addr | (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), REG_UNLOCK_BLK_ADD0);

#define NFC_SET_BLS(val) ((raw_read(REG_NFC_BLS) & NFC_BLS_RESET) | val )
#define NFC_SET_WPC(val) ((raw_read(REG_NFC_WPC) & NFC_WPC_RESET) | val )
#define CHECK_NFC_RB    raw_read(REG_NFC_RB) & NFC_RB

#define READ_PAGE()	send_read_page(0)
#define PROG_PAGE() 	send_prog_page(0)

#elif CONFIG_ARCH_MXC_HAS_NFC_V2

/*
 * For V1/V2 NFC registers Definition
 */

#define NFC_AXI_BASE_ADDR      	0x00
/*
 * Addresses for NFC registers
 */
#define NFC_BUF_SIZE            (nfc_ip_base + 0xE00)
#define NFC_BUF_ADDR            (nfc_ip_base + 0xE04)
#define NFC_FLASH_ADDR          (nfc_ip_base + 0xE06)
#define NFC_FLASH_CMD           (nfc_ip_base + 0xE08)
#define NFC_CONFIG              (nfc_ip_base + 0xE0A)
#define NFC_ECC_STATUS_RESULT   (nfc_ip_base + 0xE0C)
#define NFC_RSLTMAIN_AREA       (nfc_ip_base + 0xE0E)
#define NFC_RSLTSPARE_AREA      (nfc_ip_base + 0xE10)
#define NFC_WRPROT              (nfc_ip_base + 0xE12)
#define NFC_UNLOCKSTART_BLKADDR (nfc_ip_base + 0xE14)
#define NFC_UNLOCKEND_BLKADDR   (nfc_ip_base + 0xE16)
#define NFC_NF_WRPRST           (nfc_ip_base + 0xE18)
#define NFC_CONFIG1             (nfc_ip_base + 0xE1A)
#define NFC_CONFIG2             (nfc_ip_base + 0xE1C)

/*!
 * Addresses for NFC RAM BUFFER Main area 0
 */
#define MAIN_AREA0        (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x000)
#define MAIN_AREA1        (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x200)
#define MAIN_AREA2        (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x400)
#define MAIN_AREA3        (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x600)

/*!
 * Addresses for NFC SPARE BUFFER Spare area 0
 */
#define SPARE_AREA0       (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x800)
#define SPARE_AREA1       (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x810)
#define SPARE_AREA2       (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x820)
#define SPARE_AREA3       (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x830)
#define SPARE_LEN         16
#define SPARE_COUNT       4
#define SPARE_SIZE        (SPARE_LEN * SPARE_COUNT)

/* read column 464-465 byte but only 464 for bad block marker */
#define BAD_BLK_MARKER_MA	IO_ADDRESS(NFC_BASE_ADDR + 0x600 + 464)
/* read column 0-1 byte, but only 1 is used for swapped main area data */
#define BAD_BLK_MARKER_SP	IO_ADDRESS(NFC_BASE_ADDR + 0x800)

#define IS_4BIT_ECC       1
#define SET_SPAS(v)
#define SET_ECC_MODE(v)
#define SET_NFMS(v)	(NFMS |= (v));

#define WRITE_NFC_IP_REG(val,reg) \
	raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT),  REG_NFC_OPS_STAT)
/*!
 * Set INT to 0, Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for
 * Specific operation
 */
#define NFC_CMD            		0x1
#define NFC_ADDR           		0x2
#define NFC_INPUT          		0x4
#define NFC_OUTPUT         		0x8
#define NFC_ID             		0x10
#define NFC_STATUS         		0x20

/* Bit Definitions */
#define NFC_OPS_STAT			(1 << 15)
#define NFC_SP_EN           		(1 << 2)
#define NFC_ECC_EN          		(1 << 3)
#define NFC_INT_MSK         		(1 << 4)
#define NFC_BIG             		(1 << 5)
#define NFC_RST             		(1 << 6)
#define NFC_CE              		(1 << 7)
#define NFC_ONE_CYCLE       		(1 << 8)
#define NFC_BLS_LOCKED			0
#define NFC_BLS_LOCKED_DEFAULT		1
#define NFC_BLS_UNLCOKED		2
#define NFC_WPC_LOCK_TIGHT		1
#define NFC_WPC_LOCK			(1 << 1)
#define NFC_WPC_UNLOCK			(1 << 2)
#define NFC_FLASH_ADDR_SHIFT 		0
#define NFC_UNLOCK_END_ADDR_SHIFT	0

/* NFC Register Mapping */
#define REG_NFC_OPS_STAT		NFC_CONFIG2
#define REG_NFC_INTRRUPT		NFC_CONFIG1
#define REG_NFC_FLASH_ADDR		NFC_FLASH_ADDR
#define REG_NFC_FLASH_CMD		NFC_FLASH_CMD
#define REG_NFC_OPS			NFC_CONFIG2
#define REG_NFC_SET_RBA			NFC_BUF_ADDR
#define REG_NFC_ECC_EN			NFC_CONFIG1
#define REG_NFC_ECC_STATUS_RESULT  	NFC_ECC_STATUS_RESULT
#define REG_NFC_CE			NFC_CONFIG1
#define REG_NFC_SP_EN			NFC_CONFIG1
#define REG_NFC_BLS			NFC_CONFIG
#define REG_NFC_WPC			NFC_WRPROT
#define REG_START_BLKADDR      		NFC_UNLOCKSTART_BLKADDR
#define REG_END_BLKADDR        		NFC_UNLOCKEND_BLKADDR
#define REG_NFC_RST			NFC_CONFIG1

/* NFC V1/V2 Specific MACRO functions definitions */

#define raw_write(v,a)                  __raw_writew(v,a)
#define raw_read(a)                     __raw_readw(a)

#define NFC_SET_BLS(val)  		val

#define UNLOCK_ADDR(start_addr,end_addr)		\
{							\
	raw_write(start_addr,REG_START_BLKADDR);	\
        raw_write(end_addr,REG_END_BLKADDR);		\
}

#define NFC_SET_WPC(val)                val

/* NULL Definitions */
#define ACK_OPS
#define NFC_SET_RBA(val,buf_id)

#define READ_PAGE()   \
{                     \
	send_read_page(0);  \
	send_read_page(1);  \
	send_read_page(2);  \
	send_read_page(3);  \
}

#define PROG_PAGE()   \
{                     \
	send_prog_page(0);  \
	send_prog_page(1);  \
	send_prog_page(2);  \
	send_prog_page(3);  \
}

#define CHECK_NFC_RB            1

#endif

#ifndef BAD_BLK_MARKER_MA
#define BAD_BLK_OFFSET_MA	(0x600 + 464)
#define BAD_BLK_OFFSET_SP	0x800
/* read column 464-465 byte but only 464 for bad block marker */
#define BAD_BLK_MARKER_MA	IO_ADDRESS(NFC_BASE_ADDR_AXI + BAD_BLK_OFFSET_MA)
/* read column 0-1 byte, but only 1 is used for swapped main area data */
#define BAD_BLK_MARKER_SP	IO_ADDRESS(NFC_BASE_ADDR_AXI + BAD_BLK_OFFSET_SP)
#endif

#endif				/* __MXC_ND2_H__ */