diff options
Diffstat (limited to 'recipes-bsp/u-boot-mainline/files/0006-MLK-14938-8-imx8-Add-SMMU-setup-to-Soc-codes.patch')
| -rw-r--r-- | recipes-bsp/u-boot-mainline/files/0006-MLK-14938-8-imx8-Add-SMMU-setup-to-Soc-codes.patch | 117 |
1 files changed, 117 insertions, 0 deletions
diff --git a/recipes-bsp/u-boot-mainline/files/0006-MLK-14938-8-imx8-Add-SMMU-setup-to-Soc-codes.patch b/recipes-bsp/u-boot-mainline/files/0006-MLK-14938-8-imx8-Add-SMMU-setup-to-Soc-codes.patch new file mode 100644 index 0000000..d365185 --- /dev/null +++ b/recipes-bsp/u-boot-mainline/files/0006-MLK-14938-8-imx8-Add-SMMU-setup-to-Soc-codes.patch @@ -0,0 +1,117 @@ +From 70ff91215f9969dfa9f8640b36ef4695d5b2d3f9 Mon Sep 17 00:00:00 2001 +From: Ye Li <ye.li@nxp.com> +Date: Wed, 17 May 2017 02:19:25 -0500 +Subject: [PATCH 06/15] MLK-14938-8 imx8: Add SMMU setup to Soc codes + +We setup SMMU in arch_preboot_os to avoid breaking u-boot driver. +Add a kconfig entry CONFIG_IMX_SMMU to enable it. +So far, the USDHC0-USDHC1 and FEC0-FEC1 are added into sid. + +Signed-off-by: Peng Fan <peng.fan@nxp.com> +Signed-off-by: Ye Li <ye.li@nxp.com> +(cherry picked from downstream commit 7da6345919ee59a26cf65b4bc29072eea2fc0909) +(cherry picked from downstream commit 45308e7da90f342c2de7fbec1f8c5b8bd3f1b8e5) +--- + arch/arm/include/asm/arch-imx8/sid.h | 14 ++++++++++++ + arch/arm/mach-imx/imx8/Kconfig | 5 +++++ + arch/arm/mach-imx/imx8/cpu.c | 41 ++++++++++++++++++++++++++++++++++++ + 3 files changed, 60 insertions(+) + create mode 100644 arch/arm/include/asm/arch-imx8/sid.h + +diff --git a/arch/arm/include/asm/arch-imx8/sid.h b/arch/arm/include/asm/arch-imx8/sid.h +new file mode 100644 +index 0000000000..2250efa06b +--- /dev/null ++++ b/arch/arm/include/asm/arch-imx8/sid.h +@@ -0,0 +1,14 @@ ++/* ++ * Copyright 2017 NXP ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++#include <asm/arch/sci/sci.h> ++ ++struct smmu_sid { ++ sc_rsrc_t rsrc; ++ sc_rm_sid_t sid; ++ char dev_name[32]; ++}; ++ ++sc_err_t imx8_config_smmu_sid(struct smmu_sid *dev_sids, int size); +diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig +index bbe323d5ca..d577b0f077 100644 +--- a/arch/arm/mach-imx/imx8/Kconfig ++++ b/arch/arm/mach-imx/imx8/Kconfig +@@ -1,5 +1,10 @@ + if ARCH_IMX8 + ++config IMX_SMMU ++ bool "Enable SMMU on i.MX8" ++ help ++ Enable the SMMU for peripherals on i.MX8 ++ + config IMX8 + bool + +diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c +index f2fa262ac8..72404d9eb6 100644 +--- a/arch/arm/mach-imx/imx8/cpu.c ++++ b/arch/arm/mach-imx/imx8/cpu.c +@@ -13,6 +13,7 @@ + #include <errno.h> + #include <thermal.h> + #include <asm/arch/sci/sci.h> ++#include <asm/arch/sid.h> + #include <asm/arch/sys_proto.h> + #include <asm/arch-imx/cpu.h> + #include <asm/armv8/cpu.h> +@@ -513,6 +514,46 @@ err: + printf("%s: fuse %d, err: %d\n", __func__, word[i], ret); + } + ++#ifdef CONFIG_IMX_SMMU ++struct smmu_sid dev_sids[] = { ++ { SC_R_SDHC_0, 0x11, "SDHC0" }, ++ { SC_R_SDHC_1, 0x11, "SDHC1" }, ++ { SC_R_SDHC_2, 0x11, "SDHC2" }, ++ { SC_R_ENET_0, 0x12, "FEC0" }, ++ { SC_R_ENET_1, 0x12, "FEC1" }, ++}; ++ ++sc_err_t imx8_config_smmu_sid(struct smmu_sid *dev_sids, int size) ++{ ++ int i; ++ sc_err_t sciErr = SC_ERR_NONE; ++ ++ if ((dev_sids == NULL) || (size <= 0)) ++ return SC_ERR_NONE; ++ ++ for (i = 0; i < size; i++) { ++ sciErr = sc_rm_set_master_sid(-1, ++ dev_sids[i].rsrc, ++ dev_sids[i].sid); ++ if (sciErr != SC_ERR_NONE) { ++ printf("set master sid error\n"); ++ return sciErr; ++ } ++ } ++ ++ return SC_ERR_NONE; ++} ++#endif ++ ++void arch_preboot_os(void) ++{ ++#ifdef CONFIG_IMX_SMMU ++ sc_pm_set_resource_power_mode(-1, SC_R_SMMU, SC_PM_PW_MODE_ON); ++ ++ imx8_config_smmu_sid(dev_sids, ARRAY_SIZE(dev_sids)); ++#endif ++} ++ + u32 get_cpu_rev(void) + { + u32 id = 0, rev = 0; +-- +2.13.6 + |