ENGR00179000 i.mx6q/dl: sabresd: Add the splash screen support

This patch will add the splash screen support for the
i.mx6q/dl splash screen support.

In order to enable the splash screen, you need make sure
the following env variable has been set correctly:

splashimage=0x30000000
splashpos=m,m
lvds_num=0

The splash screen is default OFF, to enable it, please add:
on i.mx6dq sabresd platform:
define CONFIG_SPLASH_SCREEN in include/configs/mx6q_sabresd.h
or on i.mx6dl sabresd platform:
define CONFIG_SPLASH_SCREEN in include/configs/mx6dl_sabresd.h

Signed-off-by: Jason Liu <r64343@freescale.com>

1 files changed, 17 insertions, 102 deletions

diff --git a/board/freescale/mx6q_sabresd/mx6q_sabresd.c b/board/freescale/mx6q_sabresd/mx6q_sabresd.c
index d9c803f2c9..04c96c8cd7 100644
--- a/board/freescale/mx6q_sabresd/mx6q_sabresd.c
+++ b/board/freescale/mx6q_sabresd/mx6q_sabresd.c
@@ -42,10 +42,6 @@
 #include <imx_spi.h>
 #endif
 
-#if CONFIG_I2C_MXC
-#include <i2c.h>
-#endif
-
 #ifdef CONFIG_CMD_MMC
 #include <mmc.h>
 #include <fsl_esdhc.h>
@@ -300,101 +296,25 @@ static void setup_uart(void)
 }
 
 #ifdef CONFIG_VIDEO_MX5
-#ifdef CONFIG_I2C_MXC
-static void setup_i2c(unsigned int module_base)
-{
-	unsigned int reg;
-
-	switch (module_base) {
-	case I2C1_BASE_ADDR:
-#if defined CONFIG_MX6Q
-		/* i2c1 SDA */
-		mxc_iomux_v3_setup_pad(MX6Q_PAD_CSI0_DAT8__I2C1_SDA);
-
-		/* i2c1 SCL */
-		mxc_iomux_v3_setup_pad(MX6Q_PAD_CSI0_DAT9__I2C1_SCL);
-#elif defined CONFIG_MX6DL
-		/* i2c1 SDA */
-		mxc_iomux_v3_setup_pad(MX6DL_PAD_CSI0_DAT8__I2C1_SDA);
-
-		/* i2c1 SCL */
-		mxc_iomux_v3_setup_pad(MX6DL_PAD_CSI0_DAT9__I2C1_SCL);
-#endif
-
-		/* Enable i2c clock */
-		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
-		reg |= 0xC0;
-		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
-
-		break;
-	case I2C2_BASE_ADDR:
-#if defined CONFIG_MX6Q
-		/* i2c2 SDA */
-		mxc_iomux_v3_setup_pad(MX6Q_PAD_KEY_ROW3__I2C2_SDA);
-
-		/* i2c2 SCL */
-		mxc_iomux_v3_setup_pad(MX6Q_PAD_KEY_COL3__I2C2_SCL);
-#elif defined CONFIG_MX6DL
-		/* i2c2 SDA */
-		mxc_iomux_v3_setup_pad(MX6DL_PAD_KEY_ROW3__I2C2_SDA);
-
-		/* i2c2 SCL */
-		mxc_iomux_v3_setup_pad(MX6DL_PAD_KEY_COL3__I2C2_SCL);
-#endif
-
-		/* Enable i2c clock */
-		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
-		reg |= 0x300;
-		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
-
-		break;
-	case I2C3_BASE_ADDR:
-#if defined CONFIG_MX6Q
-		/* GPIO_5 for I2C3_SCL */
-		mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_3__I2C3_SCL);
-
-		/* GPIO_16 for I2C3_SDA */
-		mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_16__I2C3_SDA);
-#elif defined CONFIG_MX6DL
-		/* GPIO_5 for I2C3_SCL */
-		mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_3__I2C3_SCL);
-
-		/* GPIO_16 for I2C3_SDA */
-		if (mx6_board_is_reva())
-			mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_16__I2C3_SDA);
-		else /* other board ID define to the same */
-			mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_6__I2C3_SDA);
-#endif
-
-		/* Enable i2c clock */
-		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
-		reg |= 0xC00;
-		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
-
-		break;
-	default:
-		printf("Invalid I2C base: 0x%x\n", module_base);
-		break;
-	}
-}
-
 void setup_lvds_poweron(void)
 {
-	uchar value;
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	int reg;
+	/* AUX_5V_EN: GPIO(6, 10) */
+#ifdef CONFIG_MX6DL
+	mxc_iomux_v3_setup_pad(MX6DL_PAD_NANDF_RB0__GPIO_6_10);
+#else
+	mxc_iomux_v3_setup_pad(MX6Q_PAD_NANDF_RB0__GPIO_6_10);
+#endif
 
-#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL)
-	i2c_read(0x1f, 3, 1, &value, 1);
-	value &= ~0x2;
-	i2c_write(0x1f, 3, 1, &value, 1);
+	reg = readl(GPIO6_BASE_ADDR + GPIO_GDIR);
+	reg |= (1 << 10);
+	writel(reg, GPIO6_BASE_ADDR + GPIO_GDIR);
 
-	i2c_read(0x1f, 1, 1, &value, 1);
-	value |= 0x2;
-	i2c_write(0x1f, 1, 1, &value, 1);
-#endif
+	reg = readl(GPIO6_BASE_ADDR + GPIO_DR);
+	reg |= (1 << 10);
+	writel(reg, GPIO6_BASE_ADDR + GPIO_DR);
 }
 #endif
-#endif
 
 #ifdef CONFIG_IMX_ECSPI
 s32 spi_get_cfg(struct imx_spi_dev_t *dev)
@@ -730,18 +650,17 @@ void lcd_enable(void)
 	g_ipu_hw_rev = IPUV3_HW_REV_IPUV3H;
 
 #if defined CONFIG_MX6Q
-	/* set GPIO_9 to high so that backlight control could be high */
-	mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_9__GPIO_1_9);
+	mxc_iomux_v3_setup_pad(MX6Q_PAD_SD1_DAT3__GPIO_1_21);
 #elif defined CONFIG_MX6DL
-	mxc_iomux_v3_setup_pad(MX6DL_PAD_SD1_DAT3__PWM1_PWMO);
+	mxc_iomux_v3_setup_pad(MX6DL_PAD_SD1_DAT3__GPIO_1_21);
 #endif
 
 	reg = readl(GPIO1_BASE_ADDR + GPIO_GDIR);
-	reg |= (1 << 9);
+	reg |= (1 << 21);
 	writel(reg, GPIO1_BASE_ADDR + GPIO_GDIR);
 
 	reg = readl(GPIO1_BASE_ADDR + GPIO_DR);
-	reg |= (1 << 9);
+	reg |= (1 << 21);
 	writel(reg, GPIO1_BASE_ADDR + GPIO_DR);
 
 	/* Enable IPU clock */
@@ -845,12 +764,8 @@ int board_init(void)
 #endif
 
 #ifdef CONFIG_VIDEO_MX5
-
-#ifdef CONFIG_I2C_MXC
-	setup_i2c(CONFIG_SYS_I2C_PORT);
 	/* Enable lvds power */
 	setup_lvds_poweron();
-#endif
 
 	panel_info_init();