diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2016-11-30 13:41:55 -0800 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2017-01-11 15:45:21 +0100 |
| commit | 4651389e445d31e785320a5d09c74d24e7671eed (patch) | |
| tree | a27c6f9a54e28820347b02f37028511089bffa34 | |
| parent | 8a4b68a2cb49d6bfb8893b2c148f33c49960a2bd (diff) | |
colibri_vf: cleanup USB clock initialization
Use the same preprocessor define to enable clocks as we use to
enable the driver. Make sure that the necessary PLL's are on
(they get enabled by boot ROM by default, so this is more for
completness).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 9e73c1b7d11611d51f0026d375731f0316dd26e8)
| -rw-r--r-- | board/toradex/colibri_vf/colibri_vf.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 0f8b440df9..15f263c51e 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -368,12 +368,18 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK, CCM_CCGR10_NFC_CTRL_MASK); -#ifdef CONFIG_CI_UDC +#ifdef CONFIG_USB_EHCI_VF setbits_le32(&ccm->ccgr1, CCM_CCGR1_USBC0_CTRL_MASK); -#endif - -#ifdef CONFIG_USB_EHCI setbits_le32(&ccm->ccgr7, CCM_CCGR7_USBC1_CTRL_MASK); + + clrsetbits_le32(&anadig->pll3_ctrl, ANADIG_PLL3_CTRL_BYPASS | + ANADIG_PLL3_CTRL_POWERDOWN | + ANADIG_PLL3_CTRL_DIV_SELECT, + ANADIG_PLL3_CTRL_ENABLE); + clrsetbits_le32(&anadig->pll7_ctrl, ANADIG_PLL7_CTRL_BYPASS | + ANADIG_PLL7_CTRL_POWERDOWN | + ANADIG_PLL7_CTRL_DIV_SELECT, + ANADIG_PLL7_CTRL_ENABLE); #endif clrsetbits_le32(&anadig->pll5_ctrl, ANADIG_PLL5_CTRL_BYPASS | |