diff options
| author | Igor Opaniuk <igor.opaniuk@toradex.com> | 2019-12-03 14:04:47 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-12-23 10:28:16 +0100 |
| commit | 3a4c1c833b49b717a5b480438084b1edd6bfa1a9 (patch) | |
| tree | 91466ed43e1a6891d238c928108c2ecbf234969d | |
| parent | b3f9a339daa61154d87f890cfa88e5f6abab5ae0 (diff) | |
board: colibri_imx7: reserve DDR memory for Cortex-M4
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.
Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
(cherry picked from commit c671d8af0bb07b028d808b994b83b2ec25578a44)
| -rw-r--r-- | arch/arm/include/asm/mach-imx/sys_proto.h | 2 | ||||
| -rw-r--r-- | board/toradex/colibri_imx7/colibri_imx7.c | 37 |
2 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 4925dd7894..775cd3df40 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -113,6 +113,8 @@ void init_src(void); void init_snvs(void); void imx_wdog_disable_powerdown(void); +int arch_auxiliary_core_check_up(u32 core_id); + int board_mmc_get_env_dev(int devno); int nxp_board_rev(void); diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 61bf8bfd58..36214e2bc1 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -333,6 +333,43 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, bd_t *bd) { +#if defined(CONFIG_IMX_BOOTAUX) && defined(CONFIG_ARCH_FIXUP_FDT_MEMORY) + int up; + + up = arch_auxiliary_core_check_up(0); + if (up) { + int ret; + int areas = 1; + u64 start[2], size[2]; + + /* + * Reserve 1MB of memory for M4 (1MiB is also the minimum + * alignment for Linux due to MMU section size restrictions). + */ + start[0] = gd->bd->bi_dram[0].start; + size[0] = SZ_256M - SZ_1M; + + /* If needed, create a second entry for memory beyond 256M */ + if (gd->bd->bi_dram[0].size > SZ_256M) { + start[1] = gd->bd->bi_dram[0].start + SZ_256M; + size[1] = gd->bd->bi_dram[0].size - SZ_256M; + areas = 2; + } + + ret = fdt_set_usable_memory(blob, start, size, areas); + if (ret) { + eprintf("Cannot set usable memory\n"); + return ret; + } + } else { + int off; + + off = fdt_node_offset_by_compatible(blob, -1, + "fsl,imx7d-rpmsg"); + if (off > 0) + fdt_status_disabled(blob, off); + } +#endif #if defined(CONFIG_FDT_FIXUP_PARTITIONS) static const struct node_info nodes[] = { { "fsl,imx7d-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */ |