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authorDavid Ungar <david.ungar@timesys.com>2010-10-11 14:35:26 -0400
committerDavid Ungar <david.ungar@timesys.com>2010-10-11 14:39:36 -0400
commitcd38581459f06798e6ea6230aa1e3d92a4f521b6 (patch)
treec7960484c346940bbe653e3e2b8afb8cd2b21ae0
parent9adc3c0a69aafd9e971ea7572e5b8c0621ced59f (diff)
-rw-r--r--cpu/arm_cortexa8/omap3/board.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c
index 1e25253e0b..577bf8404d 100644
--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/cpu/arm_cortexa8/omap3/board.c
@@ -285,16 +285,6 @@ int dram_init(void)
DECLARE_GLOBAL_DATA_PTR;
unsigned int size0 = 0, size1 = 0;
- /*
- * If a second bank of DDR is attached to CS1 this is
- * where it can be started. Early init code will init
- * memory on CS0.
- */
- if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
- do_sdrc_init(CS1, NOT_EARLY);
- make_cs1_contiguous();
- }
-
size0 = get_sdr_cs_size(CS0);
size1 = get_sdr_cs_size(CS1);