diff options
| author | York Sun <york.sun@nxp.com> | 2016-12-28 08:43:40 -0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-01-04 19:40:41 -0500 |
| commit | d26e34c4c4b6473fdbd412a3b2dc33a94b08e8ff (patch) | |
| tree | 22eaf9594d9a0b0dbbe31a489a7a80f751939b1a | |
| parent | a10550385169e456950add6f3e2a4774d6aea67c (diff) | |
fsl_ddr: Move DDR config options to driver Kconfig
Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>
138 files changed, 262 insertions, 237 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 698370becf..52a9f39c63 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -770,6 +770,7 @@ config TARGET_LS1021AQDS select ARCH_LS1021A select ARCH_SUPPORT_PSCI select LS1_DEEP_SLEEP + select SYS_FSL_DDR config TARGET_LS1021ATWR bool "Support ls1021atwr" diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index d154f7b0f6..eca1d06ca5 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -3,8 +3,10 @@ config ARCH_LS1021A select SYS_FSL_ERRATUM_A010315 select SYS_FSL_SRDS_1 select SYS_HAS_SERDES - select SYS_FSL_DDR_BE - select SYS_FSL_DDR_VER_50 + select SYS_FSL_DDR_BE if SYS_FSL_DDR + select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR + select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR + select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE @@ -49,47 +51,6 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool -config SYS_FSL_DDR - bool "Freescale DDR driver" - help - Select Freescale General DDR driver, shared between most Freescale - PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- - based Layerscape SoCs (such as ls2080a). - -config SYS_FSL_DDR_BE - bool - default y - help - Access DDR registers in big-endian. - -config SYS_FSL_DDR_VER - int - default 50 if SYS_FSL_DDR_VER_50 - -config SYS_FSL_DDR_VER_50 - bool - -config SYS_FSL_DDRC_ARM_GEN3 - bool - -config SYS_FSL_DDRC_GEN4 - bool - -config SYS_FSL_DDR3 - bool "Freescale DDR3 controller" - depends on !SYS_FSL_DDR4 - select SYS_FSL_DDR - select SYS_FSL_DDRC_ARM_GEN3 - help - Enable Freescale DDR3 controller on ARM-based SoCs. - -config SYS_FSL_DDR4 - bool "Freescale DDR4 controller" - select SYS_FSL_DDR - select SYS_FSL_DDRC_GEN4 - help - Enable Freescale DDR4 controller. - config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" depends on ARCH_LS1021A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index a1f781edb7..bee7d1537c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -8,28 +8,33 @@ config ARCH_LS1012A config ARCH_LS1043A bool select FSL_LSCH2 + select SYS_FSL_DDR select SYS_FSL_DDR_BE select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A010315 select SYS_FSL_ERRATUM_A010539 + select SYS_FSL_HAS_DDR3 + select SYS_FSL_HAS_DDR4 config ARCH_LS1046A bool select FSL_LSCH2 + select SYS_FSL_DDR select SYS_FSL_DDR_BE - select SYS_FSL_DDR4 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A010539 + select SYS_FSL_HAS_DDR4 select SYS_FSL_SRDS_2 config ARCH_LS2080A bool select FSL_LSCH3 - select SYS_FSL_DDR4 + select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 select SYS_FSL_HAS_DP_DDR select SYS_FSL_HAS_SEC + select SYS_FSL_HAS_DDR4 select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE select SYS_FSL_SRDS_2 @@ -71,9 +76,6 @@ config FSL_PPA_ARMV8_PSCI implemented under the common ARMv8 PSCI framework. endmenu -config SYS_FSL_MMDC - bool - config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" @@ -129,49 +131,4 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool -config SYS_FSL_DDR - bool "Freescale DDR driver" - help - Select Freescale General DDR driver, shared between most Freescale - PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- - based Layerscape SoCs (such as ls2080a). - -config SYS_FSL_DDR_BE - bool - help - Access DDR registers in big-endian. - -config SYS_FSL_DDR_LE - bool - help - Access DDR registers in little-endian. - -config SYS_FSL_DDR_VER - int - default 50 if SYS_FSL_DDR_VER_50 - -config SYS_FSL_DDR_VER_50 - bool - -config SYS_FSL_DDRC_ARM_GEN3 - bool - -config SYS_FSL_DDRC_GEN4 - bool - -config SYS_FSL_DDR3 - bool "Freescale DDR3 controller" - depends on !SYS_FSL_DDR4 - select SYS_FSL_DDR - select SYS_FSL_DDRC_ARM_GEN3 - help - Enable Freescale DDR3 controller on ARM-based SoCs. - -config SYS_FSL_DDR4 - bool "Freescale DDR4 controller" - select SYS_FSL_DDR - select SYS_FSL_DDRC_GEN4 - help - Enable Freescale DDR4 controller. - endmenu diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 29fc33d4de..db40669e67 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -175,11 +175,11 @@ #define CONFIG_SYS_FSL_ERRATUM_A009942 #define CONFIG_SYS_FSL_ERRATUM_A009660 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 -#elif defined(CONFIG_ARCH_LS1012A) -#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3 +#elif defined(CONFIG_ARCH_LS1012A) #define GICD_BASE 0x01401000 #define GICC_BASE 0x01402000 + #elif defined(CONFIG_ARCH_LS1046A) #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_NUM_FMAN 1 diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 853e2656fa..0033c35261 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -30,9 +30,13 @@ config MPC83xx config MPC85xx bool "MPC85xx" select CREATE_ARCH_SYMLINK + select SYS_FSL_DDR + select SYS_FSL_DDR_BE config MPC86xx bool "MPC86xx" + select SYS_FSL_DDR + select SYS_FSL_DDR_BE config 8xx bool "MPC8xx" diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 3ea62caada..6e4a93172f 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -38,6 +38,9 @@ config TARGET_MPC832XEMDS config TARGET_MPC8349EMDS bool "Support MPC8349EMDS" + select SYS_FSL_DDR + select SYS_FSL_HAS_DDR2 + select SYS_FSL_DDR_BE config TARGET_MPC8349ITX bool "Support MPC8349ITX" diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 7b000d727f..307a45d6c4 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -68,6 +68,8 @@ config TARGET_P5040DS config TARGET_MPC8536DS bool "Support MPC8536DS" select ARCH_MPC8536 +# Use DDR3 controller with DDR2 DIMMs on this board + select SYS_FSL_DDRC_GEN3 config TARGET_MPC8540ADS bool "Support MPC8540ADS" @@ -104,6 +106,8 @@ config TARGET_MPC8569MDS config TARGET_MPC8572DS bool "Support MPC8572DS" select ARCH_MPC8572 +# Use DDR3 controller with DDR2 DIMMs on this board + select SYS_FSL_DDRC_GEN3 config TARGET_P1010RDB_PA bool "Support P1010RDB_PA" @@ -300,6 +304,8 @@ config TARGET_XPEDITE520X config TARGET_XPEDITE537X bool "Support xpedite537x" select ARCH_MPC8572 +# Use DDR3 controller with DDR2 DIMMs on this board + select SYS_FSL_DDRC_GEN3 config TARGET_XPEDITE550X bool "Support xpedite550x" @@ -325,6 +331,7 @@ config ARCH_B4420 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -333,6 +340,7 @@ config ARCH_B4860 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -340,6 +348,7 @@ config ARCH_B4860 config ARCH_BSC9131 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -347,6 +356,7 @@ config ARCH_BSC9131 config ARCH_BSC9132 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -355,6 +365,7 @@ config ARCH_BSC9132 config ARCH_C29X bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 @@ -363,6 +374,8 @@ config ARCH_C29X config ARCH_MPC8536 bool select FSL_LAW + select SYS_FSL_HAS_DDR2 + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -371,10 +384,12 @@ config ARCH_MPC8536 config ARCH_MPC8540 bool select FSL_LAW + select SYS_FSL_HAS_DDR1 config ARCH_MPC8541 bool select FSL_LAW + select SYS_FSL_HAS_DDR1 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -382,6 +397,7 @@ config ARCH_MPC8541 config ARCH_MPC8544 bool select FSL_LAW + select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -390,6 +406,8 @@ config ARCH_MPC8544 config ARCH_MPC8548 bool select FSL_LAW + select SYS_FSL_HAS_DDR2 + select SYS_FSL_HAS_DDR1 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -398,6 +416,7 @@ config ARCH_MPC8548 config ARCH_MPC8555 bool select FSL_LAW + select SYS_FSL_HAS_DDR1 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -405,10 +424,12 @@ config ARCH_MPC8555 config ARCH_MPC8560 bool select FSL_LAW + select SYS_FSL_HAS_DDR1 config ARCH_MPC8568 bool select FSL_LAW + select SYS_FSL_HAS_DDR2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -416,6 +437,7 @@ config ARCH_MPC8568 config ARCH_MPC8569 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -423,14 +445,17 @@ config ARCH_MPC8569 config ARCH_MPC8572 bool select FSL_LAW - select SYS_PPC_E500_USE_DEBUG_TLB + select SYS_FSL_HAS_DDR2 + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1010 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -439,6 +464,7 @@ config ARCH_P1010 config ARCH_P1011 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -447,6 +473,7 @@ config ARCH_P1011 config ARCH_P1020 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -455,6 +482,7 @@ config ARCH_P1020 config ARCH_P1021 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -463,6 +491,7 @@ config ARCH_P1021 config ARCH_P1022 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -471,6 +500,7 @@ config ARCH_P1022 config ARCH_P1023 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -478,6 +508,7 @@ config ARCH_P1023 config ARCH_P1024 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -486,6 +517,7 @@ config ARCH_P1024 config ARCH_P1025 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -494,6 +526,7 @@ config ARCH_P1025 config ARCH_P2020 bool select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 @@ -503,6 +536,7 @@ config ARCH_P2041 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -511,6 +545,7 @@ config ARCH_P3041 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -519,6 +554,7 @@ config ARCH_P4080 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -527,6 +563,7 @@ config ARCH_P5020 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -535,6 +572,7 @@ config ARCH_P5040 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -546,6 +584,8 @@ config ARCH_T1023 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 + select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 @@ -554,6 +594,8 @@ config ARCH_T1024 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 + select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 @@ -562,6 +604,8 @@ config ARCH_T1040 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 + select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 @@ -570,6 +614,8 @@ config ARCH_T1042 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 + select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 @@ -578,6 +624,7 @@ config ARCH_T2080 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -586,6 +633,7 @@ config ARCH_T2081 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -594,6 +642,7 @@ config ARCH_T4160 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 @@ -602,6 +651,7 @@ config ARCH_T4240 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig index 11afffa830..ff21c4823b 100644 --- a/arch/powerpc/cpu/mpc86xx/Kconfig +++ b/arch/powerpc/cpu/mpc86xx/Kconfig @@ -29,10 +29,14 @@ endchoice config ARCH_MPC8610 bool select FSL_LAW + select SYS_FSL_HAS_DDR1 + select SYS_FSL_HAS_DDR2 config ARCH_MPC8641 bool select FSL_LAW + select SYS_FSL_HAS_DDR1 + select SYS_FSL_HAS_DDR2 config FSL_LAW bool diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index d4f05d1806..55686a1abf 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -9,16 +9,13 @@ #ifdef CONFIG_MPC85xx #include <asm/config_mpc85xx.h> -#define CONFIG_SYS_FSL_DDR #endif #ifdef CONFIG_MPC86xx #include <asm/config_mpc86xx.h> -#define CONFIG_SYS_FSL_DDR #endif #ifdef CONFIG_MPC83xx -#define CONFIG_SYS_FSL_DDR #endif #ifndef HWCONFIG_BUFFER_SIZE diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 4e9fcc84fe..6aee5bcca1 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -16,7 +16,6 @@ #define CONFIG_PPC_SPINTABLE_COMPATIBLE #include <fsl_ddrc_version.h> -#define CONFIG_SYS_FSL_DDR_BE /* IP endianness */ #define CONFIG_SYS_FSL_IFC_BE @@ -28,17 +27,13 @@ #define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_ARCH_MPC8540) -#define CONFIG_SYS_FSL_DDRC_GEN1 #elif defined(CONFIG_ARCH_MPC8541) -#define CONFIG_SYS_FSL_DDRC_GEN1 #elif defined(CONFIG_ARCH_MPC8544) -#define CONFIG_SYS_FSL_DDRC_GEN2 #define CONFIG_SYS_FSL_ERRATUM_A005125 #elif defined(CONFIG_ARCH_MPC8548) -#define CONFIG_SYS_FSL_DDRC_GEN2 #define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 #define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 #define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 @@ -52,13 +47,10 @@ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x00 #elif defined(CONFIG_ARCH_MPC8555) -#define CONFIG_SYS_FSL_DDRC_GEN1 #elif defined(CONFIG_ARCH_MPC8560) -#define CONFIG_SYS_FSL_DDRC_GEN1 #elif defined(CONFIG_ARCH_MPC8568) -#define CONFIG_SYS_FSL_DDRC_GEN2 #define QE_MURAM_SIZE 0x10000UL #define MAX_QE_RISC 2 #define QE_NUM_OF_SNUM 28 @@ -544,9 +536,6 @@ #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#endif #define CONFIG_SYS_FSL_NUM_CC_PLLS 2 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 } #define CONFIG_SYS_FSL_SRDS_1 @@ -588,9 +577,6 @@ #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ #define CONFIG_SYS_FMAN_V3 -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#endif #define CONFIG_SYS_FSL_NUM_CC_PLL 2 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 } #define CONFIG_SYS_FSL_SRDS_1 @@ -697,13 +683,6 @@ #define CONFIG_SYS_FSL_THREADS_PER_CORE 1 #endif -#if !defined(CONFIG_SYS_FSL_DDRC_GEN1) && \ - !defined(CONFIG_SYS_FSL_DDRC_GEN2) && \ - !defined(CONFIG_SYS_FSL_DDRC_GEN3) && \ - !defined(CONFIG_SYS_FSL_DDRC_GEN4) -#define CONFIG_SYS_FSL_DDRC_GEN3 -#endif - #if !defined(CONFIG_ARCH_C29X) #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #endif diff --git a/arch/powerpc/include/asm/config_mpc86xx.h b/arch/powerpc/include/asm/config_mpc86xx.h index f053b9cf5e..5eabe6df41 100644 --- a/arch/powerpc/include/asm/config_mpc86xx.h +++ b/arch/powerpc/include/asm/config_mpc86xx.h @@ -7,6 +7,4 @@ #ifndef _ASM_MPC86xx_CONFIG_H_ #define _ASM_MPC86xx_CONFIG_H_ -#define CONFIG_SYS_FSL_DDR_86XX - #endif /* _ASM_MPC85xx_CONFIG_H_ */ diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index 3361dbc2aa..bb975d24a7 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR2=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index 2e84b3f723..59986aecf6 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR2=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index 3ec85aced2..83eb24dde7 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR2=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index fd83da1b5e..9661a818d3 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR2=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig index b05496a1a9..64210eb12a 100644 --- a/configs/MPC8572DS_36BIT_defconfig +++ b/configs/MPC8572DS_36BIT_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y +CONFIG_SYS_FSL_DDR2=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig index 19d3d33ece..1c6765de07 100644 --- a/configs/MPC8572DS_defconfig +++ b/configs/MPC8572DS_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y +CONFIG_SYS_FSL_DDR2=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index 936cc3eb3a..0fae73c14a 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SECURE_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 166bee32ef..f067c8c2f8 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index bd2b438288..b717fd7ada 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -6,7 +6,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 1563609b4f..861025b590 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index a86657d313..cda5f5cda3 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index f067c8c2f8..a2afdd4c38 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index 2ab4752d1a..c4545533d8 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index e45baefe94..0a9e20cab6 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index d6ad422803..bf3f46f5ed 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 8ef312f5d4..1c2b362856 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index 736becfe3e..ba43e80bd5 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index b8dc316284..785578085b 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 3ba1e3550a..86eaccc66b 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index c5ab87be99..f807077742 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -12,7 +12,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index 63af509bf9..ebba63d3de 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -12,7 +12,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index 6c96cd0993..816dbb23ca 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 587cca1bca..d0b05b896c 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -13,7 +13,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index 87be2b59db..a0ea45877b 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -5,7 +5,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index 0af3b36156..1c183f4be3 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -6,7 +6,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index a07afc7899..aa1ae6e44d 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index 1c183f4be3..30b0701bda 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 2129bf487c..85b0a4af57 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index fc74dec744..1b926c320b 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index c0965ebe8e..634a1c2e16 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 9f05ac370b..257df4b72e 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index e246c435d2..7929c99247 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 4c6b918a17..6dcafb1919 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -13,7 +13,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index c2c03ee723..db2b220236 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -13,7 +13,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index b07464fd23..4318b964dc 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 0a2f37903a..78b036abf8 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -14,7 +14,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index ef68c5ff5a..5992559f38 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -6,7 +6,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index 14aa1fd2ce..0daf8a7dba 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index d8aa1f73ca..5ea696c588 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index af98400481..f36e0ec5e7 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index 369944dec2..39d9fad406 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index 4a9bd3a307..0eee7a5e14 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index dbb9c0b8e4..6080bf590e 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index 2223e6d6c9..19230e5549 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 95930f3ae6..7b1bcc30d2 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y -CONFIG_SYS_FSL_DDR4=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 27ef79d3c3..fd5b3b28bc 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y -CONFIG_SYS_FSL_DDR4=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_FIT=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index e28aa487b9..1eaa6401c9 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR3=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -38,6 +37,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_SYS_FSL_DDR3=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index f3de25fdd5..820d6fcce2 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -1,7 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SECURE_BOOT=y -CONFIG_SYS_FSL_DDR3=y CONFIG_VIDEO=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y @@ -27,6 +26,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 12205eaca7..1972fd0c0e 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y -CONFIG_SYS_FSL_DDR3=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y @@ -27,6 +26,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 4d910cd4ba..dd44140205 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y -CONFIG_SYS_FSL_DDR3=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_FIT=y @@ -28,6 +27,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 79eb9fe9ab..24443e2a05 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y -CONFIG_SYS_FSL_DDR3=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y @@ -31,6 +30,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index beed9ac6bd..6f14a032bd 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR3=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -39,6 +38,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index d6b08de2a2..49bcba07a2 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR3=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -41,6 +40,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 6ddd54c7f3..55079825f3 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y -CONFIG_SYS_FSL_DDR4=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index dce9bda43a..ec911e0504 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y -CONFIG_SYS_FSL_DDR4=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index ac6da0ea7a..bb3466f1a9 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 454701a7dc..5aa058bc15 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y -CONFIG_SYS_FSL_DDR3=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -24,6 +23,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SPI_FLASH=y CONFIG_PCI=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index f76a698877..4e07ff36ab 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y -CONFIG_SYS_FSL_DDR4=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 22faf715ee..5c20633c59 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index e8e31b66a5..707dcb5208 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index ae2efeb203..d429017dda 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043ARDB=y -CONFIG_SYS_FSL_DDR4=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 9042ac702a..9fa892138d 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043ARDB=y -CONFIG_SYS_FSL_DDR4=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 9f0c491f9f..73e66036a6 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043ARDB=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 0b3f247034..171ec37e28 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043ARDB=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_FSL_DDR4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 2cc1a0b39c..5636885975 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 74fcd4ae72..ebb1b5eb9d 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index c8a68faf0d..bdb8433fc6 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index fe9ad0efca..9995047e15 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 17000820a4..4fccce4216 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index fd21959bec..38117f2124 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4,EMMC_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index a973cf4b75..765868a616 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -5,7 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 0b810d3bc4..c74e007ca4 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig index b0508a59ba..2d20c28b8d 100644 --- a/configs/ls2080a_emu_defconfig +++ b/configs/ls2080a_emu_defconfig @@ -6,7 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="EMU,LS2080A" CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 1ed6e0558f..b443be3505 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_MMC=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 63a15ee9d5..d26f1b6e56 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -6,7 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_MMC=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 4500c137c1..91b3b57bee 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -12,7 +12,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 0e92ad4597..803d3bb264 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT,LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,LS2080A" CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 848abbc21c..0e6f4dcf98 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_MMC=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 4718ab3808..f22c6256df 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -6,7 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="LS2080A" CONFIG_BOOTDELAY=10 CONFIG_CMD_GREPENV=y CONFIG_CMD_MMC=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index b79e4e4009..f42f00a289 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -12,7 +12,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A" +CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A" CONFIG_BOOTDELAY=10 CONFIG_SPL=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig index e38e1da299..8e86a3306e 100644 --- a/configs/xpedite537x_defconfig +++ b/configs/xpedite537x_defconfig @@ -15,5 +15,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_SNTP=y +CONFIG_SYS_FSL_DDR2=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/drivers/Kconfig b/drivers/Kconfig index e8c9e0a326..0e5d97d166 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -16,6 +16,8 @@ source "drivers/crypto/Kconfig" source "drivers/demo/Kconfig" +source "drivers/ddr/fsl/Kconfig" + source "drivers/dfu/Kconfig" source "drivers/dma/Kconfig" diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig new file mode 100644 index 0000000000..ad5858d123 --- /dev/null +++ b/drivers/ddr/fsl/Kconfig @@ -0,0 +1,122 @@ +config SYS_FSL_DDR + bool + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_MMDC + bool + help + Select Freescale Multi Mode DDR controller (MMDC). + +config SYS_FSL_DDR_BE + bool + help + Access DDR registers in big-endian + +config SYS_FSL_DDR_LE + bool + help + Access DDR registers in little-endian + +menu "Freescale DDR controllers" + depends on SYS_FSL_DDR + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + default 47 if SYS_FSL_DDR_VER_47 + default 46 if SYS_FSL_DDR_VER_46 + default 44 if SYS_FSL_DDR_VER_44 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDR_VER_47 + bool + +config SYS_FSL_DDR_VER_46 + bool + +config SYS_FSL_DDR_VER_44 + bool + +config SYS_FSL_DDRC_GEN1 + bool + help + Enable Freescale DDR controller. + +config SYS_FSL_DDRC_GEN2 + bool + depends on !MPC86xx + help + Enable Freescale DDR2 controller. + +config SYS_FSL_DDRC_86XX_GEN2 + bool + depends on MPC86xx + help + Enable Freescale DDR2 controller for MPC86xx SoCs. + +config SYS_FSL_DDRC_GEN3 + bool + depends on PPC + help + Enable Freescale DDR3 controller for PowerPC SoCs. + +config SYS_FSL_DDRC_ARM_GEN3 + bool + depends on ARM + help + Enable Freescale DDR3 controller for ARM SoCs. + +config SYS_FSL_DDRC_GEN4 + bool + help + Enable Freescale DDR4 controller. + +config SYS_FSL_HAS_DDR4 + bool + +config SYS_FSL_HAS_DDR3 + bool + +config SYS_FSL_HAS_DDR2 + bool + +config SYS_FSL_HAS_DDR1 + bool + +choice + prompt "DDR technology" + default SYS_FSL_DDR4 if SYS_FSL_HAS_DDR4 + default SYS_FSL_DDR3 if SYS_FSL_HAS_DDR3 + default SYS_FSL_DDR2 if SYS_FSL_HAS_DDR2 + default SYS_FSL_DDR1 if SYS_FSL_HAS_DDR1 + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + depends on SYS_FSL_HAS_DDR4 + select SYS_FSL_DDRC_GEN4 + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on SYS_FSL_HAS_DDR3 + select SYS_FSL_DDRC_GEN3 if PPC + select SYS_FSL_DDRC_ARM_GEN3 if ARM + +config SYS_FSL_DDR2 + bool "Freescale DDR2 controller" + depends on SYS_FSL_HAS_DDR2 + select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3) + select SYS_FSL_DDRC_86XX_GEN2 if MPC86xx + +config SYS_FSL_DDR1 + bool "Freescale DDR1 controller" + depends on SYS_FSL_HAS_DDR1 + select SYS_FSL_DDRC_GEN1 + +endchoice + +endmenu diff --git a/drivers/ddr/fsl/Makefile b/drivers/ddr/fsl/Makefile index 00dea428e3..7935f7d56f 100644 --- a/drivers/ddr/fsl/Makefile +++ b/drivers/ddr/fsl/Makefile @@ -30,7 +30,7 @@ obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o -obj-$(CONFIG_SYS_FSL_DDR_86XX) += mpc86xx_ddr.o +obj-$(CONFIG_SYS_FSL_DDRC_86XX_GEN2) += mpc86xx_ddr.o obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o obj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index e3ed3178a0..101a398472 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -228,7 +228,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DDR_SPD #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_FSL_DDR3 #ifndef CONFIG_SPL_BUILD #define CONFIG_FSL_DDR_INTERACTIVE #endif diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 33c015a6ab..7864936962 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -70,7 +70,6 @@ #define CONFIG_SYS_MEMTEST_END 0x01ffffff /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #undef CONFIG_SYS_DDR_RAW_TIMING #undef CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 64b502d459..5a28225b98 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -125,7 +125,6 @@ #define CONFIG_SYS_MEMTEST_END 0x01ffffff /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */ #define SPD_EEPROM_ADDRESS2 0x56 /* I2C access */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index a47d23ce1c..53ee98c311 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -126,7 +126,6 @@ #define CONFIG_PANIC_HANG /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x50 diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 12b1ce5c08..d289bf4d6f 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -60,12 +60,9 @@ #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ /* - * define CONFIG_SYS_FSL_DDR2 to use unified DDR driver - * undefine it to use old spd_sdram.c + * SYS_FSL_DDR2 is selected in Kconfig to use unified DDR driver + * unselect it to use old spd_sdram.c */ -#define CONFIG_SYS_FSL_DDR2 -#ifdef CONFIG_SYS_FSL_DDR2 -#define CONFIG_SYS_FSL_DDRC_GEN2 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x52 #define SPD_EEPROM_ADDRESS2 0x51 @@ -74,7 +71,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#endif /* * 32-bit data path mode. diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 46ba306632..b9dfd76227 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -95,7 +95,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 02ad0b0f26..c0d74fa25f 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -68,7 +68,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 0d850fe2f1..f2618a0e3b 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -43,7 +43,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 96c0b114f6..406ac5a624 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -52,7 +52,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 7ffacf8a57..84292b441e 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -62,7 +62,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 9f75f9baf8..7058b855b7 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -43,7 +43,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 871d14e93a..218d77d1bd 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -67,7 +67,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 84fea61746..3573ef4df0 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -50,7 +50,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 08d61cd8cb..22fe36ad7a 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -77,7 +77,6 @@ extern unsigned long get_clock_freq(void); #endif /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 1c7dbc853e..c91e0324f5 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -82,7 +82,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 761032e923..48eada5fbb 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -79,7 +79,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD for DDR */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 8845ea9170..d413f215f3 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -101,7 +101,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 3077b05fe5..cd9cd9ac56 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -224,7 +224,6 @@ #define CONFIG_PANIC_HANG /* do not reset board on panic */ /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 78d5b5d996..d2cc61c6a9 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -136,7 +136,6 @@ /* DDR Setup */ #define CONFIG_DDR_SPD #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR3 #ifdef CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 1ebe83689e..d8ff10e284 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SDRAM_SIZE 512u /* DDR is 512M */ #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 5107aaaed0..9c389d4739 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -165,7 +165,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index b2c9221413..ea1c5e23dc 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -248,9 +248,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 37bc506937..12b7039372 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -273,12 +273,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_DDR_INTERACTIVE #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) -#define CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SDRAM_SIZE 2048 #endif diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index e4073eaf4e..ad8e9c0e90 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -168,9 +168,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index abf0d714f1..78be32fd9e 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -273,9 +273,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 940b1c7d44..14356d0906 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -220,7 +220,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 454bfdc0f6..325080f467 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -205,7 +205,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 445af8436d..8c891cb08e 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -133,7 +133,6 @@ #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 /* * IFC Definitions diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 29544b28a8..3d220c2109 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -176,7 +176,6 @@ /* DDR Setup */ #define CONFIG_DDR_ECC_ENABLE -#define CONFIG_SYS_FSL_DDR3 #ifndef CONFIG_DDR_ECC_ENABLE #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 4f6927c182..7347b68eb4 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -122,7 +122,6 @@ #define CONFIG_SYS_SDRAM_SIZE 1024 #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 5720386d1e..115df2a0cd 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -176,7 +176,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index b0ae073a96..d1b85474aa 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -123,7 +123,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 87f1932513..22194f99ed 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -101,7 +101,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d3e058526c..a3afa6b7eb 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -314,7 +314,6 @@ #endif /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 0cf6bf23dd..f1492979dd 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -81,7 +81,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M #define CONFIG_CHIP_SELECTS_PER_CTRL 1 diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index b81ff75656..7c5961a670 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -96,7 +96,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ /* diff --git a/include/configs/socrates.h b/include/configs/socrates.h index d148f877fa..806fc2749b 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -68,7 +68,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 91982a4ffe..4fd6f4def6 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -89,7 +89,6 @@ #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 /* * IFC Definitions diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index df36ad7ce9..49c485ee7f 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -35,7 +35,6 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 22ada4c1d4..cc8b794d3d 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -32,7 +32,6 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 73a8a20cc6..f37cf88171 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -41,7 +41,6 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 7582813498..6203142202 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -42,7 +42,6 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 5a60174b1b..797611d0e6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -5327,20 +5327,9 @@ CONFIG_SYS_FSL_DCSR_DDR_ADDR CONFIG_SYS_FSL_DCSR_SIZE CONFIG_SYS_FSL_DCU_BE CONFIG_SYS_FSL_DCU_LE -CONFIG_SYS_FSL_DDR -CONFIG_SYS_FSL_DDR1 -CONFIG_SYS_FSL_DDR2 CONFIG_SYS_FSL_DDR2_ADDR -CONFIG_SYS_FSL_DDR3 CONFIG_SYS_FSL_DDR3L CONFIG_SYS_FSL_DDR3_ADDR -CONFIG_SYS_FSL_DDR4 -CONFIG_SYS_FSL_DDRC_ARM_GEN3 -CONFIG_SYS_FSL_DDRC_GEN1 -CONFIG_SYS_FSL_DDRC_GEN2 -CONFIG_SYS_FSL_DDRC_GEN3 -CONFIG_SYS_FSL_DDRC_GEN4 -CONFIG_SYS_FSL_DDR_86XX CONFIG_SYS_FSL_DDR_ADDR CONFIG_SYS_FSL_DDR_BE CONFIG_SYS_FSL_DDR_EMU |