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authorPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2017-02-02 15:01:13 +0530
committerYork Sun <york.sun@nxp.com>2017-02-03 14:31:02 -0800
commitd98b98d62e7d4326f254eda87d2fc4c76807b1f1 (patch)
tree6a771e65bb9c234ec8be187781c6c3fa37ca9ec8
parent5b404be671890e0ae4f84fb14f62bb5865e67a65 (diff)
arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat
-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig17
-rw-r--r--include/configs/B4860QDS.h1
-rw-r--r--include/configs/BSC9131RDB.h1
-rw-r--r--include/configs/BSC9132QDS.h1
-rw-r--r--include/configs/C29XPCIE.h1
-rw-r--r--include/configs/P1010RDB.h1
-rw-r--r--include/configs/T102xQDS.h1
-rw-r--r--include/configs/T102xRDB.h1
-rw-r--r--include/configs/T1040QDS.h1
-rw-r--r--include/configs/T104xRDB.h1
-rw-r--r--include/configs/T208xQDS.h1
-rw-r--r--include/configs/T208xRDB.h1
-rw-r--r--include/configs/T4240RDB.h1
-rw-r--r--include/configs/t4qds.h1
14 files changed, 17 insertions, 13 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 38ea4c1440..a3db01407c 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -374,6 +374,7 @@ config ARCH_B4420
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
+ select FSL_IFC
config ARCH_B4860
bool
@@ -398,6 +399,7 @@ config ARCH_B4860
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
+ select FSL_IFC
config ARCH_BSC9131
bool
@@ -410,6 +412,7 @@ config ARCH_BSC9131
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
+ select FSL_IFC
config ARCH_BSC9132
bool
@@ -426,6 +429,7 @@ config ARCH_BSC9132
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC_E500_USE_DEBUG_TLB
+ select FSL_IFC
config ARCH_C29X
bool
@@ -438,6 +442,7 @@ config ARCH_C29X
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_6
select SYS_PPC_E500_USE_DEBUG_TLB
+ select FSL_IFC
config ARCH_MPC8536
bool
@@ -553,6 +558,7 @@ config ARCH_P1010
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC_E500_USE_DEBUG_TLB
+ select FSL_IFC
config ARCH_P1011
bool
@@ -795,6 +801,7 @@ config ARCH_T1023
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
+ select FSL_IFC
config ARCH_T1024
bool
@@ -811,6 +818,7 @@ config ARCH_T1024
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
+ select FSL_IFC
config ARCH_T1040
bool
@@ -828,6 +836,7 @@ config ARCH_T1040
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
+ select FSL_IFC
config ARCH_T1042
bool
@@ -845,6 +854,7 @@ config ARCH_T1042
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
+ select FSL_IFC
config ARCH_T2080
bool
@@ -866,6 +876,7 @@ config ARCH_T2080
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
+ select FSL_IFC
config ARCH_T2081
bool
@@ -885,6 +896,7 @@ config ARCH_T2081
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
+ select FSL_IFC
config ARCH_T4160
bool
@@ -905,6 +917,7 @@ config ARCH_T4160
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
+ select FSL_IFC
config ARCH_T4240
bool
@@ -928,6 +941,7 @@ config ARCH_T4240
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
+ select FSL_IFC
config BOOKE
bool
@@ -1260,6 +1274,9 @@ config SYS_PPC64
config SYS_PPC_E500_USE_DEBUG_TLB
bool
+config FSL_IFC
+ bool
+
config SYS_PPC_E500_DEBUG_TLB
int "Temporary TLB entry for external debugger"
depends on SYS_PPC_E500_USE_DEBUG_TLB
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 3ad9f80ce1..4267d81d95 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -63,7 +63,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 31976f3bd2..db7574d5b5 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -46,7 +46,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_TSEC_ENET
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index dbd3724a83..4c55da401c 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -68,7 +68,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 53ee98c311..269cd49648 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -68,7 +68,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 979a8f1f65..83bb2ccf1a 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -130,7 +130,6 @@
#endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 530253fcc6..669a09487c 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 88094e0e13..57e0cfa07b 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 58bafd25a7..385e7abc29 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -51,7 +51,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 703e1e3049..bcb8edaa0d 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -162,7 +162,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 210d8d8343..9ec326abca 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -33,7 +33,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 19411885b9..b11423447c 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -27,7 +27,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index e15b0ea88b..9136bf036e 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -73,7 +73,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 0f59eb1c17..82e4691ca3 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -26,7 +26,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-21 02:24:49 +0000