diff options
| author | Igor Opaniuk <igor.opaniuk@toradex.com> | 2020-03-23 20:14:05 +0200 |
|---|---|---|
| committer | Igor Opaniuk <igor.opaniuk@toradex.com> | 2020-03-24 14:46:31 +0200 |
| commit | 569703d45b63cff563822e5fec54674ed33079d2 (patch) | |
| tree | 9a3c338299f6e9e9b289c56b76dd8e1bbf744588 | |
| parent | 3dfa96656f746810462cf36eed76f02c1d577fb0 (diff) | |
verdin-imx8mm: sync with EVK board
1. MMC_UHS/HS_ enable in defconfig by default
2. VDD_DRAM/VDD_SOC changes in SPL
3. FEC anatop clock fixes
Related-to: ELB-2605
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| -rw-r--r-- | board/toradex/verdin-imx8mm/spl.c | 13 | ||||
| -rw-r--r-- | board/toradex/verdin-imx8mm/verdin-imx8mm.c | 2 | ||||
| -rw-r--r-- | configs/verdin-imx8mm_defconfig | 4 |
3 files changed, 11 insertions, 8 deletions
diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c index 5f1bfbbc17..98242ca015 100644 --- a/board/toradex/verdin-imx8mm/spl.c +++ b/board/toradex/verdin-imx8mm/spl.c @@ -156,9 +156,11 @@ int power_init_board(void) /* unlock the PMIC regs */ pmic_reg_write(p, BD71837_REGLOCK, 0x1); - /* increase VDD_DRAM to 0.9v for 3Ghz DDR */ - pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x2); + /* increase VDD_SOC to typical value 0.85v before first DRAM access */ + pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0x0f); + /* increase VDD_DRAM to 0.975v for 3Ghz DDR */ + pmic_reg_write(p, BD71837_BUCK5_VOLT, 0x83); #ifndef CONFIG_IMX8M_LPDDR4 /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */ pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28); @@ -197,8 +199,8 @@ void board_init_f(ulong dummy) { int ret; - /* Clear global data */ - memset((void *)gd, 0, sizeof(gd_t)); + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); arch_cpu_init(); @@ -208,9 +210,6 @@ void board_init_f(ulong dummy) preloader_console_init(); - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - ret = spl_init(); if (ret) { debug("spl_init() failed: %d\n", ret); diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 56d1490166..ff9d36661e 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -94,7 +94,7 @@ static int setup_fec(void) /* Use 125M anatop REF_CLK1 for ENET1, not from external */ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], - IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_SHIFT, 0); + IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK, 0); return set_clk_enet(ENET_125MHZ); } diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 406c202ba5..7e087cb7f3 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -47,6 +47,10 @@ CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y |