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authorEric Nelson <eric.nelson@boundarydevices.com>2012-09-13 10:57:25 -0700
committerJustin Waters <justin.waters@timesys.com>2012-09-24 11:15:35 -0400
commit9a876ebbf59462bc94ea5abcf854725ad64f65a1 (patch)
tree05cddf81b662ec0c0d2938d05ebbfc9c140f329d
parentfa708f0c6fdf3072694ab95dd9f80919e093225e (diff)
mx6q_sabrelite: toggle PHY reset for Nitrogen6X
-rw-r--r--board/freescale/mx6q_sabrelite/mx6q_sabrelite.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c b/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c
index a57f58c9f9..7654f67f41 100644
--- a/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c
+++ b/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c
@@ -502,6 +502,10 @@ iomux_v3_cfg_t enet_pads[] = {
MX6Q_PAD_GPIO_0__CCM_CLKO,
MX6Q_PAD_GPIO_3__CCM_CLKO2,
MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
+ (MX6Q_PAD_EIM_D23__GPIO_3_23 & ~MUX_PAD_CTRL_MASK) |
+ MUX_PAD_CTRL(0x48), /* Phy Reset For Sabrelite */
+ (MX6Q_PAD_ENET_RXD0__GPIO_1_27 & ~MUX_PAD_CTRL_MASK) |
+ MUX_PAD_CTRL(0x48), /* Phy Reset For Nitrogen6w */
};
iomux_v3_cfg_t enet_pads_final[] = {
@@ -560,12 +564,10 @@ int mx6_rgmii_rework(char *devname, int phy_addr)
void enet_board_init(void)
{
- iomux_v3_cfg_t enet_reset =
- (MX6Q_PAD_EIM_D23__GPIO_3_23 &
- ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(0x48);
-
- /* phy reset: gpio3-23 */
+ /* Sabrelite phy reset: gpio3-23 */
set_gpio_output_val(GPIO3_BASE_ADDR, (1 << 23), 0);
+ /* Nitrogen6w phy reset: gpio1-27 */
+ set_gpio_output_val(GPIO1_BASE_ADDR, (1 << 27), 0);
set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 30),
(CONFIG_FEC0_PHY_ADDR >> 2));
set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 25), 1);
@@ -573,11 +575,13 @@ void enet_board_init(void)
set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 28), 1);
set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 29), 1);
mxc_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
- mxc_iomux_v3_setup_pad(enet_reset);
set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 24), 1);
udelay(500);
+ /* Sabrelite phy reset: gpio3-23 */
set_gpio_output_val(GPIO3_BASE_ADDR, (1 << 23), 1);
+ /* Nitrogen6w phy reset: gpio1-27 */
+ set_gpio_output_val(GPIO1_BASE_ADDR, (1 << 27), 1);
mxc_iomux_v3_setup_multiple_pads(enet_pads_final,
ARRAY_SIZE(enet_pads_final));
}