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authorStephen Warren <swarren@nvidia.com>2016-09-13 10:45:50 -0600
committerTom Warren <twarren@nvidia.com>2016-09-27 09:11:02 -0700
commit50a303bdfa413f8387da32f428ea1f3829c94498 (patch)
treee47bdb9f9ff2ad47bd71bef82aecdf77b0037e69 /arch/arm/dts/tegra20.dtsi
parenteb631d7fb008201ce29200a649b0397c2f8536d2 (diff)
ARM: tegra: pull Tegra20 SoC DT from Linux v4.7
This brings in a few minor fixes since the last sync. The largest change is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock doesn't actually exist. Remaining deltas: * Addition of u-boot,dm-pre-reloc property to a couple of nodes. * Addition of the NAND controller, which Linux doesn't yet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/dts/tegra20.dtsi')
-rw-r--r--arch/arm/dts/tegra20.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 31223e4fc9..84bb1b0215 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -147,7 +147,7 @@
interrupt-parent = <&intc>;
reg = <0x50040600 0x20>;
interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
clocks = <&tegra_car TEGRA20_CLK_TWD>;
};
@@ -311,7 +311,7 @@
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra20-uart" and to enable the APB DMA based serial
- * driver, the comptible is "nvidia,tegra20-hsuart".
+ * driver, the compatible is "nvidia,tegra20-hsuart".
*/
uarta: serial@70006000 {
compatible = "nvidia,tegra20-uart";