Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04

* origin/imx_v2022.04: (8 commits)
  MLK-25979-3 imx8ulp: xrdc: Set MRC4/5 for access DDR from A35 and APD PER
  MLK-25979-2 imx8ulp: soc: Limit the eMMC ROM API workaround to A0.1 part
  MLK-25979-1 imx8ulp: soc: Get chip revision from Sentinel
  LF-6576 serial: lpuart: Fix LPUART FIFO_RXFE for all platforms
  MLK-25974 tcpc: check if i2c_dev is NULL before dm_i2c_read/write operation
  ...

5 files changed, 121 insertions, 57 deletions

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index 14e11efe2b..13474a35fc 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -109,10 +109,18 @@
 	fsl,signal-voltage-switch-extra-delay-ms = <8>;
 };
 
+&lpi2c1 {
+	u-boot,dm-spl;
+};
+
 &lpi2c2 {
 	u-boot,dm-spl;
 };
 
+&lpi2c3 {
+	u-boot,dm-spl;
+};
+
 &{/soc@0/bus@44000000/i2c@44350000/pmic@25} {
 	u-boot,dm-spl;
 };
@@ -121,10 +129,18 @@
 	u-boot,dm-spl;
 };
 
+&pinctrl_lpi2c1 {
+	u-boot,dm-spl;
+};
+
 &pinctrl_lpi2c2 {
 	u-boot,dm-spl;
 };
 
+&pinctrl_lpi2c3 {
+	u-boot,dm-spl;
+};
+
 &fec {
 	phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index 94ce0ff40b..38bf2aeb99 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -137,60 +137,6 @@
 			};
 		};
 	};
-
-	ptn5110: tcpc@50 {
-		compatible = "nxp,ptn5110";
-		reg = <0x50>;
-		interrupt-parent = <&pcal6524>;
-		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
-		status = "okay";
-
-		port {
-			typec1_dr_sw: endpoint {
-				remote-endpoint = <&usb1_drd_sw>;
-			};
-		};
-
-		typec1_con: connector {
-			compatible = "usb-c-connector";
-			label = "USB-C";
-			power-role = "dual";
-			data-role = "dual";
-			try-power-role = "sink";
-			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
-			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
-				     PDO_VAR(5000, 20000, 3000)>;
-			op-sink-microwatt = <15000000>;
-			self-powered;
-		};
-	};
-
-	ptn5110_2: tcpc@51 {
-		compatible = "nxp,ptn5110";
-		reg = <0x51>;
-		interrupt-parent = <&pcal6524>;
-		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
-		status = "okay";
-
-		port {
-			typec2_dr_sw: endpoint {
-				remote-endpoint = <&usb2_drd_sw>;
-			};
-		};
-
-		typec2_con: connector {
-			compatible = "usb-c-connector";
-			label = "USB-C";
-			power-role = "dual";
-			data-role = "dual";
-			try-power-role = "sink";
-			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
-			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
-				     PDO_VAR(5000, 20000, 3000)>;
-			op-sink-microwatt = <15000000>;
-			self-powered;
-		};
-	};
 };
 
 &lpi2c2 {
@@ -315,6 +261,70 @@
 	};
 };
 
+&lpi2c3 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clock-frequency = <400000>;
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&pinctrl_lpi2c3>;
+	pinctrl-1 = <&pinctrl_lpi2c3>;
+	status = "okay";
+
+	ptn5110: tcpc@50 {
+		compatible = "nxp,ptn5110";
+		reg = <0x50>;
+		interrupt-parent = <&pcal6524>;
+		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+		status = "okay";
+
+		port {
+			typec1_dr_sw: endpoint {
+				remote-endpoint = <&usb1_drd_sw>;
+			};
+		};
+
+		typec1_con: connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			data-role = "dual";
+			try-power-role = "sink";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+				     PDO_VAR(5000, 20000, 3000)>;
+			op-sink-microwatt = <15000000>;
+			self-powered;
+		};
+	};
+
+	ptn5110_2: tcpc@51 {
+		compatible = "nxp,ptn5110";
+		reg = <0x51>;
+		interrupt-parent = <&pcal6524>;
+		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
+		status = "okay";
+
+		port {
+			typec2_dr_sw: endpoint {
+				remote-endpoint = <&usb2_drd_sw>;
+			};
+		};
+
+		typec2_con: connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			data-role = "dual";
+			try-power-role = "sink";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+				     PDO_VAR(5000, 20000, 3000)>;
+			op-sink-microwatt = <15000000>;
+			self-powered;
+		};
+	};
+};
+
 &lpuart1 { /* console */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;
@@ -541,6 +551,13 @@
 		>;
 	};
 
+	pinctrl_lpi2c3: lpi2c3grp {
+		fsl,pins = <
+			MX93_PAD_GPIO_IO28__LPI2C3_SDA			0x40000b9e
+			MX93_PAD_GPIO_IO29__LPI2C3_SCL			0x40000b9e
+		>;
+	};
+
 	pinctrl_pcal6524: pcal6524grp {
 		fsl,pins = <
 			MX93_PAD_CCM_CLKO2__GPIO3_IO27			0x31e
diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c
index 6d2adcfca6..caf19357d8 100644
--- a/arch/arm/mach-imx/imx8ulp/rdc.c
+++ b/arch/arm/mach-imx/imx8ulp/rdc.c
@@ -276,6 +276,15 @@ void xrdc_init_mda(void)
 
 void xrdc_init_mrc(void)
 {
+	/* Set MRC4 and MRC5 for DDR access from A35 and AP NIC PER masters */
+	xrdc_config_mrc_w0_w1(4, 0, CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE);
+	xrdc_config_mrc_dx_perm(4, 0, 7, 1);
+	xrdc_config_mrc_w3_w4(4, 0, 0x0, 0x80000FFF);
+
+	xrdc_config_mrc_w0_w1(5, 0, CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE);
+	xrdc_config_mrc_dx_perm(5, 0, 1, 1);
+	xrdc_config_mrc_w3_w4(5, 0, 0x0, 0x80000FFF);
+
 	/* The MRC8 is for SRAM1 */
 	xrdc_config_mrc_w0_w1(8, 0, 0x21000000, 0x10000);
 	/* Allow for all domains: So domain 2/3 (HIFI DSP/LPAV) is ok to access */
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 46b9bb3c03..eb76ee4103 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -152,9 +152,18 @@ int board_usb_gadget_port_auto(void)
 }
 #endif
 
+static void set_cpu_info(struct sentinel_get_info_data *info)
+{
+	gd->arch.soc_rev = info->soc;
+	gd->arch.lifecycle = info->lc;
+	memcpy((void *)&gd->arch.uid, &info->uid, 4 * sizeof(u32));
+}
+
 u32 get_cpu_rev(void)
 {
-	return (MXC_CPU_IMX8ULP << 12) | CHIP_REV_1_0;
+	u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
+
+	return (MXC_CPU_IMX8ULP << 12) | (CHIP_REV_1_0 + rev);
 }
 
 enum bt_mode get_boot_mode(void)
@@ -760,6 +769,8 @@ int arch_cpu_init_dm(void)
 {
 	struct udevice *devp;
 	int node, ret;
+	u32 res;
+	struct sentinel_get_info_data info;
 
 	node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "fsl,imx8ulp-mu");
 
@@ -769,6 +780,16 @@ int arch_cpu_init_dm(void)
 		return ret;
 	}
 
+	ret = ahab_get_info(&info, &res);
+	if (ret) {
+		printf("ahab_get_info failed %d\n", ret);
+		/* fallback to A0.1 revision */
+		memset((void *)&info, 0, sizeof(struct sentinel_get_info_data));
+		info.soc = 0xa000084d;
+	}
+
+	set_cpu_info(&info);
+
 	return 0;
 }
 
@@ -856,7 +877,8 @@ int (*card_emmc_is_boot_part_en)(void) = (void *)0x67cc;
 u32 spl_arch_boot_image_offset(u32 image_offset, u32 rom_bt_dev)
 {
 	/* Hard code for eMMC image_offset on 8ULP ROM, need fix by ROM, temp workaround */
-	if (((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_MMC && card_emmc_is_boot_part_en())
+	if (is_soc_rev(CHIP_REV_1_0) && ((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_MMC &&
+		card_emmc_is_boot_part_en())
 		image_offset = 0;
 
 	return image_offset;
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 597472aa78..7dc33941a9 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -587,7 +587,7 @@ u32 imx_get_i2cclk(u32 i2c_num)
 	if (i2c_num > 7)
 		return -EINVAL;
 
-	return ccm_clk_root_get_rate(LPUART1_CLK_ROOT + i2c_num);
+	return ccm_clk_root_get_rate(LPI2C1_CLK_ROOT + i2c_num);
 }
 
 u32 get_lpuart_clk(void)