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authorWills Wang <wills.wang@live.com>2016-03-16 16:59:59 +0800
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2016-05-21 01:25:50 +0200
commit6a7b52bc8d30090633d098f9e988276beb7a53d5 (patch)
tree1aaeb4e17dbba7a2602aabb811048e20225cf94e /arch/mips/dts
parentb85dc4607268ffc49af642ab702d44c8b5ef3719 (diff)
mips: ath79: add AP121 reference board
This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/dts')
-rw-r--r--arch/mips/dts/Makefile1
-rw-r--r--arch/mips/dts/ap121.dts43
-rw-r--r--arch/mips/dts/ar933x.dtsi82
3 files changed, 126 insertions, 0 deletions
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index b5139187c2..30e5c6871a 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -2,6 +2,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
+dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
targets += $(dtb-y)
diff --git a/arch/mips/dts/ap121.dts b/arch/mips/dts/ap121.dts
new file mode 100644
index 0000000000..e31f601d03
--- /dev/null
+++ b/arch/mips/dts/ap121.dts
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "ar933x.dtsi"
+
+/ {
+ model = "AP121 Reference Board";
+ compatible = "qca,ap121", "qca,ar933x";
+
+ aliases {
+ spi0 = &spi0;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&xtal {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&spi0 {
+ spi-max-frequency = <25000000>;
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ memory-map = <0x9f000000 0x00800000>;
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi
new file mode 100644
index 0000000000..11f60a2864
--- /dev/null
+++ b/arch/mips/dts/ar933x.dtsi
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "qca,ar933x";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips24Kc";
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ xtal: xtal {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-output-names = "xtal";
+ };
+ };
+
+ pinctrl {
+ u-boot,dm-pre-reloc;
+ compatible = "qca,ar933x-pinctrl";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x18040000 0x100>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uart0: uart@18020000 {
+ compatible = "qca,ar9330-uart";
+ reg = <0x18020000 0x20>;
+ interrupts = <128 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+ };
+
+ spi0: spi@1f000000 {
+ compatible = "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+ interrupts = <129 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};