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authorAlex Nemirovsky <Alex.Nemirovsky@cortina-access.com>2019-12-23 20:19:20 +0000
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2020-04-09 18:55:59 +0200
commitebdc27895492e740d96c67d624821cfeb56c7544 (patch)
tree7c3d0c1e3160078406c03ea9b6c6920318e179fb /arch/mips
parentdfd5321becc54d7ce9fd564aaaba70a2132c058e (diff)
MIPS: allow override of flush_dcache_range()
Useful in custom HW designs which have a need to flush dcache range in a completely non standard way. Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/lib/cache.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 502956d050..1a8c87d094 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -141,7 +141,7 @@ ops_done:
instruction_hazard_barrier();
}
-void flush_dcache_range(ulong start_addr, ulong stop)
+void __weak flush_dcache_range(ulong start_addr, ulong stop)
{
unsigned long lsize = dcache_line_size();
unsigned long slsize = scache_line_size();