summaryrefslogtreecommitdiff
path: root/arch/x86/dts
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2016-01-17 16:11:11 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-01-24 12:07:19 +0800
commit788cd90864e469da7928a9efae3d017a09b2d035 (patch)
tree1afa0bd73691037573bed82f4a1b207871ca1e67 /arch/x86/dts
parent4acc83d437da7a40e7c2b1874eaba23273ec6bc2 (diff)
x86: ivybridge: Move lpc_early_init() to probe()
Move this code to the LPC's probe() method so that it will happen automatically when the LPC is probed before relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/dts')
-rw-r--r--arch/x86/dts/chromebook_link.dts3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index d5c5bfdd08..f2db8443d2 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -192,8 +192,6 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
- gen-dec = <0x800 0xfc 0x900 0xfc>;
- intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
0x80 0x80 0x80 0x80>;
intel,gpi-routing = <0 0 0 0 0 0 0 2
@@ -224,6 +222,7 @@
#address-cells = <1>;
#size-cells = <0>;
u-boot,dm-pre-reloc;
+ intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
cros-ec@200 {
compatible = "google,cros-ec";
reg = <0x204 1 0x200 1 0x880 0x80>;