summaryrefslogtreecommitdiff
path: root/arch/x86
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2016-03-06 19:28:13 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-03-17 10:27:23 +0800
commitd6d50db8a32674e56d4464688b1d74c9edaab550 (patch)
tree8c665fe4cc09d214271a724875adeae7b88caa14 /arch/x86
parent963a811ab42aac2fac6fc063dc7cc689a3336d28 (diff)
x86: gpio: Correct GPIO setup ordering
The Intel GPIO driver can set up the GPIO pin mapping when the first GPIO is probed. However, it assumes that the first GPIO to be probed is in the first GPIO bank. If this is not the case then the init will write to the wrong registers. Fix this. Also add a note that this code is deprecated. We should move to using device tree instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/include/asm/gpio.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 403851b792..40f4958052 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -12,6 +12,7 @@
struct ich6_bank_platdata {
uint16_t base_addr;
const char *bank_name;
+ int offset;
};
#define GPIO_MODE_NATIVE 0
@@ -146,6 +147,10 @@ struct pch_gpio_map {
} set3;
};
+/*
+ * Deprecated functions to set up the GPIO map. The device tree should be used
+ * instead.
+ */
int gpio_ich6_pinctrl_init(void);
void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);