diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-04-20 15:33:04 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2017-05-29 14:10:55 -0700 |
| commit | d240529a27efe3f3aad679070c47ad98867a09d5 (patch) | |
| tree | 776bba5ad2a6b52e28c52ce58895b3d202030eb3 /arch | |
| parent | 60021a4daa9720ae89e31def9483a09a78ead049 (diff) | |
apalis/colibri_t30: improve vdd core pmic handling
Make sure TPS62362 set 0 defaults to 1.200V as the Linux kernel may
switch to set 0 using TPS65911 GPIO1 (EN_CORE_DVFS_N) connected to
TPS62362 VSEL1 prior to actually setting it to a sane value dependent on
the current CPU frequency.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/tegra30/cpu.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index e0c99842a0..b0923fabbb 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -31,6 +31,10 @@ void tegra_i2c_ll_write_data(uint data, uint config) writel(config, ®->cnfg); } +#define TPS62362_I2C_ADDR 0xC0 /* Linux 0x60 */ +#define TPS62362_SET0_REG 0x00 +#define TPS62362_SET0_DATA (0x2B00 | TPS62362_SET0_REG) + #define TPS62366A_I2C_ADDR 0xC0 #define TPS62366A_SET1_REG 0x01 #define TPS62366A_SET1_DATA (0x4600 | TPS62366A_SET1_REG) @@ -39,7 +43,7 @@ void tegra_i2c_ll_write_data(uint data, uint config) #define TPS62361B_SET3_REG 0x03 #define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) -#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_I2C_ADDR 0x5A /* Linux 0x2d */ #define TPS65911_GPIO1_REG 0x61 #define TPS65911_GPIO1_DATA (0x0000 | TPS65911_GPIO1_REG) #define TPS65911_VDDCTRL_OP_REG 0x28 @@ -59,6 +63,12 @@ static void enable_cpu_power_rail(void) writel(reg, &pmc->pmc_cntrl); /* Set VDD_CORE to 1.200V. */ +#ifdef CONFIG_TEGRA_VDD_CORE_TPS62362_SET0 + udelay(1000); + tegra_i2c_ll_write_addr(TPS62362_I2C_ADDR, 2); + tegra_i2c_ll_write_data(TPS62362_SET0_DATA, I2C_SEND_2_BYTES); + udelay(1000); +#endif #ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 tegra_i2c_ll_write_addr(TPS62366A_I2C_ADDR, 2); tegra_i2c_ll_write_data(TPS62366A_SET1_DATA, I2C_SEND_2_BYTES); |