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| author | Tom Rini <trini@konsulko.com> | 2020-06-03 11:52:13 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-06-03 11:52:13 -0400 |
| commit | f1a69b8c733614ca8293891d4f7a1d1bdbe665c9 (patch) | |
| tree | 96f42aaacc6627ae37510424eee7e8c46be5455f /arch | |
| parent | 49c8c91cc69546f7a2017bc0943ef1225a01c72c (diff) | |
| parent | 1e7d00ae262e124eaf97d9e3ce4fb25739e4f5d6 (diff) | |
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 emac support
- USB PHY H6 logic alignment
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-sunxi/dram_sunxi_dw.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 5d84798ca4..a462538521 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -79,15 +79,15 @@ enum { MBUS_QOS_HIGHEST }; -inline void mbus_configure_port(u8 port, - bool bwlimit, - bool priority, - u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ - u8 waittime, /* 0 .. 0xf */ - u8 acs, /* 0 .. 0xff */ - u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ - u16 bwl1, - u16 bwl2) +static inline void mbus_configure_port(u8 port, + bool bwlimit, + bool priority, + u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ + u8 waittime, /* 0 .. 0xf */ + u8 acs, /* 0 .. 0xff */ + u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ + u16 bwl1, + u16 bwl2) { struct sunxi_mctl_com_reg * const mctl_com = (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; |