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authorEran Matityahu <eran.m@variscite.com>2017-12-14 20:20:02 +0200
committerStefano Babic <sbabic@denx.de>2018-01-03 14:01:38 +0100
commitaf104ae5b87c8efb107ac282d09927d8346dc94f (patch)
treedb68d12e56ed3dc249d179941149d5ad9f76c8a1 /board/engicam
parentbaefb63a13d106458577704ca4586b3f414c9520 (diff)
imx: spl: Fix NAND bootmode detection
commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit") broke the NAND bootmode detection by checking if BOOT_CFG1[7:4] == 0x8 for NAND boot mode. This commit essentially reverts it, while using the IMX6_BMODE_* macros that were introduced since. Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not necessarily 0x0 in this case. Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf, like it was in the code before. Signed-off-by: Eran Matityahu <eran.m@variscite.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'board/engicam')
-rw-r--r--board/engicam/common/board.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c
index f633c71916..1bdd833196 100644
--- a/board/engicam/common/board.c
+++ b/board/engicam/common/board.c
@@ -69,7 +69,7 @@ int board_late_init(void)
#endif
env_set("modeboot", "mmcboot");
break;
- case IMX6_BMODE_NAND:
+ case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
env_set("modeboot", "nandboot");
break;
default: