diff options
author | Ye Li <ye.li@nxp.com> | 2020-09-07 03:26:58 -0700 |
---|---|---|
committer | Ye Li <ye.li@nxp.com> | 2020-09-07 21:17:08 -0700 |
commit | 99767e137a4a8fc4a6a3288b5d69779239415b91 (patch) | |
tree | 918f68ee97245b927ecc29447965e16b7e6987a6 /board/freescale | |
parent | 59bcdda5391d8d36068b44726a95d2e22bac1ed6 (diff) |
MLK-24720 imx8mq_ddr4_val: Change to use iMX8M DDR driver
Add the DDR4 timing file generated from RPA tool and update codes to
enable the DDR driver
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/imx8mq_val/Makefile | 2 | ||||
-rw-r--r-- | board/freescale/imx8mq_val/ddr/ddr4/ddr_init.c | 228 | ||||
-rw-r--r-- | board/freescale/imx8mq_val/ddr/ddr4/ddrphy_train.c | 1362 | ||||
-rw-r--r-- | board/freescale/imx8mq_val/ddr4_timing.c | 1409 | ||||
-rw-r--r-- | board/freescale/imx8mq_val/spl.c | 9 |
5 files changed, 1419 insertions, 1591 deletions
diff --git a/board/freescale/imx8mq_val/Makefile b/board/freescale/imx8mq_val/Makefile index f39274ab05..3681638bd7 100644 --- a/board/freescale/imx8mq_val/Makefile +++ b/board/freescale/imx8mq_val/Makefile @@ -12,6 +12,6 @@ obj-y += ddr/helper.o ifdef CONFIG_TARGET_IMX8MQ_DDR3L_VAL obj-y += ddr/ddr3l/ddr_init.o ddr/ddr3l/ddrphy_train.o else -obj-y += ddr/ddr4/ddr_init.o ddr/ddr4/ddrphy_train.o +obj-$(CONFIG_IMX8M_DDR4) += ddr4_timing.o endif endif diff --git a/board/freescale/imx8mq_val/ddr/ddr4/ddr_init.c b/board/freescale/imx8mq_val/ddr/ddr4/ddr_init.c deleted file mode 100644 index 2f68c4c0ed..0000000000 --- a/board/freescale/imx8mq_val/ddr/ddr4/ddr_init.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright 2017 NXP - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <errno.h> -#include <asm/io.h> -#include <asm/arch/ddr.h> -#include <asm/arch/clock.h> -#include "../ddr.h" - -#ifdef CONFIG_ENABLE_DDR_TRAINING_DEBUG -#define ddr_printf(args...) printf(args) -#else -#define ddr_printf(args...) -#endif - -#include "../wait_ddrphy_training_complete.c" - -volatile unsigned int tmp, tmp_t; -void umctl2_cfg(void){ - reg32_write(DDRC_DBG1(0), 0x00000001); - reg32_write(DDRC_PWRCTL(0), 0x00000001); - tmp = reg32_read(DDRC_STAT(0)); - while (tmp_t == 0x00000001){ - tmp = reg32_read(DDRC_STAT(0)); - tmp_t = tmp && 0x00000001; - } - - reg32_write(DDRC_MSTR(0), 0x83040010); /* Two ranks */ - - reg32_write(DDRC_MRCTRL0(0), 0x40007030); - reg32_write(DDRC_MRCTRL1(0), 0x000170df); - reg32_write(DDRC_MRCTRL2(0), 0x97d37be3); - reg32_write(DDRC_DERATEEN(0), 0x00000302); - reg32_write(DDRC_DERATEINT(0), 0xbc808cc7); - reg32_write(DDRC_MSTR2(0), 0x00000001); - reg32_write(DDRC_PWRCTL(0), 0x000001ae); - reg32_write(DDRC_PWRTMG(0), 0x000d2800); - reg32_write(DDRC_HWLPCTL(0), 0x000c0000); - reg32_write(DDRC_HWFFCCTL(0), 0x00000010); - reg32_write(DDRC_RFSHCTL0(0), 0x007090b0); - reg32_write(DDRC_RFSHCTL1(0), 0x00420019); - reg32_write(DDRC_RFSHCTL3(0), 0x00000010); - reg32_write(DDRC_RFSHTMG(0), 0x0049009d); - reg32_write(DDRC_CRCPARCTL0(0), 0x00000000); - reg32_write(DDRC_CRCPARCTL1(0), 0x00001011); - reg32_write(DDRC_INIT0(0), 0xc0030002); - reg32_write(DDRC_INIT1(0), 0x00030006); - reg32_write(DDRC_INIT2(0), 0x00000305); - reg32_write(DDRC_INIT3(0), 0x0a300001); - reg32_write(DDRC_INIT4(0), 0x10180240); - reg32_write(DDRC_INIT5(0), 0x0011008a); - reg32_write(DDRC_INIT6(0), 0x0a000042); - reg32_write(DDRC_INIT7(0), 0x00000800); - reg32_write(DDRC_DIMMCTL(0), 0x00000032); /* [1] dimm_addr_mirr_en, it will effect the MRS if use umctl2 to initi dram. */ - reg32_write(DDRC_RANKCTL(0), 0x00000530); - reg32_write(DDRC_DRAMTMG0(0), 0x14132813); - reg32_write(DDRC_DRAMTMG1(0), 0x0007051b); - reg32_write(DDRC_DRAMTMG2(0), 0x090a050f); - reg32_write(DDRC_DRAMTMG3(0), 0x0000f00f); - reg32_write(DDRC_DRAMTMG4(0), 0x08030409); - reg32_write(DDRC_DRAMTMG5(0), 0x0c0d0504); - reg32_write(DDRC_DRAMTMG6(0), 0x00000003); - reg32_write(DDRC_DRAMTMG7(0), 0x00000d0c); - reg32_write(DDRC_DRAMTMG8(0), 0x05051f09); - reg32_write(DDRC_DRAMTMG9(0), 0x0002040c); - reg32_write(DDRC_DRAMTMG10(0), 0x000e0d0b); - reg32_write(DDRC_DRAMTMG11(0), 0x1409011e); - reg32_write(DDRC_DRAMTMG12(0), 0x0000000d); - reg32_write(DDRC_DRAMTMG13(0), 0x09000000); - reg32_write(DDRC_DRAMTMG14(0), 0x00000371); - reg32_write(DDRC_DRAMTMG15(0), 0x80000000); - reg32_write(DDRC_DRAMTMG17(0), 0x0076006e); - reg32_write(DDRC_ZQCTL0(0), 0x51000040); - reg32_write(DDRC_ZQCTL1(0), 0x00000070); - reg32_write(DDRC_ZQCTL2(0), 0x00000000); - reg32_write(DDRC_DFITMG0(0), 0x038f820c); - reg32_write(DDRC_DFITMG1(0), 0x00020103); - reg32_write(DDRC_DFILPCFG0(0), 0x07e1b011); - reg32_write(DDRC_DFILPCFG1(0), 0x00000030); - reg32_write(DDRC_DFIUPD0(0), 0xe0400018); - reg32_write(DDRC_DFIUPD1(0), 0x004e00c3); - reg32_write(DDRC_DFIUPD2(0), 0x00000000); - reg32_write(DDRC_DFIMISC(0), 0x00000001); - reg32_write(DDRC_DFITMG2(0), 0x00000f0c); - reg32_write(DDRC_DFITMG3(0), 0x00000001); - reg32_write(DDRC_DBICTL(0), 0x00000000); - reg32_write(DDRC_DFIPHYMSTR(0), 0x00000000); - - reg32_write(DDRC_ADDRMAP0(0), 0x00001F17); /* [4:0]cs0: 6+23 */ - reg32_write(DDRC_ADDRMAP1(0), 0x003F0808); /* [5:0] bank b0: 2+8; [13:8] b1: P3+8 ; [21:16] b2: 4+, unused */ - reg32_write(DDRC_ADDRMAP2(0), 0x00000000); /* [3:0] col-b2: 2; [11:8] col-b3: 3+0; [19:16] col-b4: 4+0 ; [27:24] col-b5: 5+0 */ - reg32_write(DDRC_ADDRMAP3(0), 0x00000000); /* [3:0] col-b6: 6+0; [11:8] col-b7: 7+0; [19:16] col-b8: 8+0 ; [27:24] col-b9: 9+0 */ - reg32_write(DDRC_ADDRMAP4(0), 0x00001f1f); /* col-b10, col-b11 not used */ - reg32_write(DDRC_ADDRMAP5(0), 0x07070707); /* [3:0] row-b0: 6+7; [11:8] row-b1: 7+7; [19:16] row-b2_b10: 8~16+7; [27:24] row-b11: 17+7 */ - reg32_write(DDRC_ADDRMAP6(0), 0x07070707); /* [3:0] row-b12:18+7; [11:8] row-b13: 19+7; [19:16] row-b14:20+7 */ - reg32_write(DDRC_ADDRMAP7(0), 0x00000f0f); /* col-b10, col-b11 not used */ - reg32_write(DDRC_ADDRMAP8(0), 0x00003F0A); /* [5:0] bg-b0: 2+10; [13:8]bg-b1:3+, unused */ - reg32_write(DDRC_ADDRMAP9(0), 0x00000000); /* it's valid only when ADDRMAP5.addrmap_row_b2_10 is set to value 15 */ - reg32_write(DDRC_ADDRMAP10(0), 0x00000000);/* it's valid only when ADDRMAP5.addrmap_row_b2_10 is set to value 15 */ - reg32_write(DDRC_ADDRMAP11(0), 0x00000000); - - - reg32_write(DDRC_ODTCFG(0), 0x05170558); - reg32_write(DDRC_ODTMAP(0), 0x00002113); - reg32_write(DDRC_SCHED(0), 0x0d6f0705); - reg32_write(DDRC_SCHED1(0), 0x00000000); - reg32_write(DDRC_PERFHPR1(0), 0xe500558b); - reg32_write(DDRC_PERFLPR1(0), 0x75001fea); - reg32_write(DDRC_PERFWR1(0), 0x880026c7); - reg32_write(DDRC_DBG0(0), 0x00000011); - reg32_write(DDRC_DBG1(0), 0x00000000); - reg32_write(DDRC_DBGCMD(0), 0x00000000); - reg32_write(DDRC_SWCTL(0), 0x00000001); - reg32_write(DDRC_POISONCFG(0), 0x00100011); - reg32_write(DDRC_PCCFG(0), 0x00000100); - reg32_write(DDRC_PCFGR_0(0), 0x00015313); - reg32_write(DDRC_PCFGW_0(0), 0x000050dc); - reg32_write(DDRC_PCTRL_0(0), 0x00000001); - reg32_write(DDRC_PCFGQOS0_0(0), 0x01100200); - reg32_write(DDRC_PCFGQOS1_0(0), 0x01ba023a); - reg32_write(DDRC_PCFGWQOS0_0(0), 0x00110000); - reg32_write(DDRC_PCFGWQOS1_0(0), 0x0000001e); -} - -int ddr_init(struct dram_timing_info *timing_info) -{ - /* change the clock source of dram_apb_clk_root */ - clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | - CLK_ROOT_SOURCE_SEL(4) | - CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); - - /* disable the clock gating */ - reg32_write(0x303A00EC,0x0000ffff); - reg32setbit(0x303A00F8,5); - reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F000000); - - dram_pll_init(MHZ(600)); - - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); - - /* Configure uMCTL2's registers */ - umctl2_cfg(); - - tmp = reg32_read(DDRC_RFSHCTL3(0)); - reg32_write(DDRC_RFSHCTL3(0), 0x00000011); - - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000000); - - ddr_load_train_code(FW_1D_IMAGE); - - reg32_write(DDRC_DBG1(0), 0x00000000); - tmp = reg32_read(DDRC_PWRCTL(0)); - reg32_write(DDRC_PWRCTL(0), 0x000001ae); - tmp = reg32_read(DDRC_PWRCTL(0)); - reg32_write(DDRC_PWRCTL(0), 0x000001ac); - reg32_write(DDRC_SWCTL(0), 0x00000000); - tmp = reg32_read(DDRC_CRCPARSTAT(0)); - - reg32_write(DDRC_DFIMISC(0), 0x00000000); - reg32_write(DDRC_DFIMISC(0), 0x00000000); - - tmp = reg32_read(DDRC_DBICTL(0)); - tmp = reg32_read(DDRC_MSTR(0)); - tmp = reg32_read(DDRC_INIT3(0)); - tmp = reg32_read(DDRC_INIT4(0)); - tmp = reg32_read(DDRC_INIT6(0)); - tmp = reg32_read(DDRC_INIT7(0)); - tmp = reg32_read(DDRC_INIT0(0)); - - ddr4_phyinit_train_2400mts(); - - do { - tmp_t = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*0x00020097); - } while (tmp_t != 0); - - - reg32_write(DDRC_DFIMISC(0), 0x00000020); - - /* wait DFISTAT.dfi_init_complete to 1 */ - tmp_t = 0; - while(tmp_t == 0){ - tmp = reg32_read(DDRC_DFISTAT(0)); - tmp_t = tmp & 0x01; - } - - /* clear DFIMISC.dfi_init_complete_en */ - reg32_write(DDRC_DFIMISC(0), 0x00000000); - /* set DFIMISC.dfi_init_complete_en again */ - reg32_write(DDRC_DFIMISC(0), 0x00000001); - reg32_write(DDRC_PWRCTL(0), 0x0000018c); - - /* set SWCTL.sw_done to enable quasi-dynamic register programming outside reset .*/ - reg32_write(DDRC_SWCTL(0), 0x00000001); - - /* wait SWSTAT.sw_done_ack to 1 */ - tmp_t = 0; - while(tmp_t==0){ - tmp = reg32_read(DDRC_SWSTAT(0)); - tmp_t = tmp & 0x01; - } - - /* wait STAT to normal state */ - tmp_t = 0; - while(tmp_t==0){ - tmp = reg32_read(DDRC_STAT(0)); - tmp_t = tmp & 0x01; - } - - tmp = reg32_read(DDRC_CRCPARSTAT(0)); - - reg32_write(DDRC_PWRCTL(0), 0x0000018c); - - reg32_write(DDRC_DERATEEN(0), 0x00000302); - - reg32_write(DDRC_PCTRL_0(0), 0x00000001); - - reg32_write(DDRC_RFSHCTL3(0), 0x00000010); /* dis_auto-refresh is set to 0 */ - - reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*(0xd0000), 0); - tmp = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*(0x54030)); - tmp = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*(0x54035)); - reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*(0xd0000), 1); - return 0; -} diff --git a/board/freescale/imx8mq_val/ddr/ddr4/ddrphy_train.c b/board/freescale/imx8mq_val/ddr/ddr4/ddrphy_train.c deleted file mode 100644 index 25593248ce..0000000000 --- a/board/freescale/imx8mq_val/ddr/ddr4/ddrphy_train.c +++ /dev/null @@ -1,1362 +0,0 @@ -/* - * Copyright 2017 NXP - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/clock.h> -#include <asm/arch/ddr.h> -#include "../ddr.h" - -#define DDR_RON 2 -#define PHY_RTT 48 -#define PHYREF_VALUE 0x3b - -#define PHY_RON 40 -#define DDR_RTT 5 -#define MR6_VALUE 0x1f - -void ddr4_phyinit_train_2400mts(){ - dwc_ddrphy_apb_wr(0x1005f,0x2ff); /* DWC_DDRPHYA_DBYTE0_TxSlewRate_b0_p0 */ - dwc_ddrphy_apb_wr(0x1015f,0x2ff); /* DWC_DDRPHYA_DBYTE0_TxSlewRate_b1_p0 */ - dwc_ddrphy_apb_wr(0x1105f,0x2ff); /* DWC_DDRPHYA_DBYTE1_TxSlewRate_b0_p0 */ - dwc_ddrphy_apb_wr(0x1115f,0x2ff); /* DWC_DDRPHYA_DBYTE1_TxSlewRate_b1_p0 */ - dwc_ddrphy_apb_wr(0x1205f,0x2ff); /* DWC_DDRPHYA_DBYTE2_TxSlewRate_b0_p0 */ - dwc_ddrphy_apb_wr(0x1215f,0x2ff); /* DWC_DDRPHYA_DBYTE2_TxSlewRate_b1_p0 */ - dwc_ddrphy_apb_wr(0x1305f,0x2ff); /* DWC_DDRPHYA_DBYTE3_TxSlewRate_b0_p0 */ - dwc_ddrphy_apb_wr(0x1315f,0x2ff); /* DWC_DDRPHYA_DBYTE3_TxSlewRate_b1_p0 */ - - dwc_ddrphy_apb_wr(0x55,0x3ff); /* DWC_DDRPHYA_ANIB0_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x1055,0x3ff); /* DWC_DDRPHYA_ANIB1_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x2055,0x3ff); /* DWC_DDRPHYA_ANIB2_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x3055,0x3ff); /* DWC_DDRPHYA_ANIB3_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x4055,0xff); /* DWC_DDRPHYA_ANIB4_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x5055,0xff); /* DWC_DDRPHYA_ANIB5_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x6055,0x3ff); /* DWC_DDRPHYA_ANIB6_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x7055,0x3ff); /* DWC_DDRPHYA_ANIB7_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x8055,0x3ff); /* DWC_DDRPHYA_ANIB8_ATxSlewRate */ - - dwc_ddrphy_apb_wr(0x9055,0x3ff); /* DWC_DDRPHYA_ANIB9_ATxSlewRate */ - dwc_ddrphy_apb_wr(0x200c5,0xa); /* DWC_DDRPHYA_MASTER0_PllCtrl2_p0 */ - dwc_ddrphy_apb_wr(0x2002e,0x2); /* DWC_DDRPHYA_MASTER0_ARdPtrInitVal_p0 */ - dwc_ddrphy_apb_wr(0x20024,0x9); /* DWC_DDRPHYA_MASTER0_DqsPreambleControl_p0 */ - dwc_ddrphy_apb_wr(0x2003a,0x2); /* DWC_DDRPHYA_MASTER0_DbyteDllModeCntrl */ - dwc_ddrphy_apb_wr(0x20056,0x2); /* DWC_DDRPHYA_MASTER0_ProcOdtTimeCtl_p0 */ - dwc_ddrphy_apb_wr(0x1004d,0x1a); /* DWC_DDRPHYA_DBYTE0_TxOdtDrvStren_b0_p0 */ - dwc_ddrphy_apb_wr(0x1014d,0x1a); /* DWC_DDRPHYA_DBYTE0_TxOdtDrvStren_b1_p0 */ - dwc_ddrphy_apb_wr(0x1104d,0x1a); /* DWC_DDRPHYA_DBYTE1_TxOdtDrvStren_b0_p0 */ - dwc_ddrphy_apb_wr(0x1114d,0x1a); /* DWC_DDRPHYA_DBYTE1_TxOdtDrvStren_b1_p0 */ - dwc_ddrphy_apb_wr(0x1204d,0x1a); /* DWC_DDRPHYA_DBYTE2_TxOdtDrvStren_b0_p0 */ - dwc_ddrphy_apb_wr(0x1214d,0x1a); /* DWC_DDRPHYA_DBYTE2_TxOdtDrvStren_b1_p0 */ - dwc_ddrphy_apb_wr(0x1304d,0x1a); /* DWC_DDRPHYA_DBYTE3_TxOdtDrvStren_b0_p0 */ - dwc_ddrphy_apb_wr(0x1314d,0x1a); /* DWC_DDRPHYA_DBYTE3_TxOdtDrvStren_b1_p0 */ - dwc_ddrphy_apb_wr(0x10049,0xe38); /* DWC_DDRPHYA_DBYTE0_TxImpedanceCtrl1_b0_p0 */ - dwc_ddrphy_apb_wr(0x10149,0xe38); /* DWC_DDRPHYA_DBYTE0_TxImpedanceCtrl1_b1_p0 */ - dwc_ddrphy_apb_wr(0x11049,0xe38); /* DWC_DDRPHYA_DBYTE1_TxImpedanceCtrl1_b0_p0 */ - dwc_ddrphy_apb_wr(0x11149,0xe38); /* DWC_DDRPHYA_DBYTE1_TxImpedanceCtrl1_b1_p0 */ - dwc_ddrphy_apb_wr(0x12049,0xe38); /* DWC_DDRPHYA_DBYTE2_TxImpedanceCtrl1_b0_p0 */ - dwc_ddrphy_apb_wr(0x12149,0xe38); /* DWC_DDRPHYA_DBYTE2_TxImpedanceCtrl1_b1_p0 */ - dwc_ddrphy_apb_wr(0x13049,0xe38); /* DWC_DDRPHYA_DBYTE3_TxImpedanceCtrl1_b0_p0 */ - dwc_ddrphy_apb_wr(0x13149,0xe38); /* DWC_DDRPHYA_DBYTE3_TxImpedanceCtrl1_b1_p0 */ - dwc_ddrphy_apb_wr(0x43,0x3ff); /* DWC_DDRPHYA_ANIB0_ATxImpedance */ - dwc_ddrphy_apb_wr(0x1043,0x3ff); /* DWC_DDRPHYA_ANIB1_ATxImpedance */ - dwc_ddrphy_apb_wr(0x2043,0x3ff); /* DWC_DDRPHYA_ANIB2_ATxImpedance */ - dwc_ddrphy_apb_wr(0x3043,0x3ff); /* DWC_DDRPHYA_ANIB3_ATxImpedance */ - dwc_ddrphy_apb_wr(0x4043,0x3ff); /* DWC_DDRPHYA_ANIB4_ATxImpedance */ - dwc_ddrphy_apb_wr(0x5043,0x3ff); /* DWC_DDRPHYA_ANIB5_ATxImpedance */ - dwc_ddrphy_apb_wr(0x6043,0x3ff); /* DWC_DDRPHYA_ANIB6_ATxImpedance */ - dwc_ddrphy_apb_wr(0x7043,0x3ff); /* DWC_DDRPHYA_ANIB7_ATxImpedance */ - dwc_ddrphy_apb_wr(0x8043,0x3ff); /* DWC_DDRPHYA_ANIB8_ATxImpedance */ - dwc_ddrphy_apb_wr(0x9043,0x3ff); /* DWC_DDRPHYA_ANIB9_ATxImpedance */ - dwc_ddrphy_apb_wr(0x20018,0x5); /* DWC_DDRPHYA_MASTER0_DfiMode */ - dwc_ddrphy_apb_wr(0x20075,0x2); /* DWC_DDRPHYA_MASTER0_DfiCAMode */ - dwc_ddrphy_apb_wr(0x20050,0x0); /* DWC_DDRPHYA_MASTER0_CalDrvStr0 */ - dwc_ddrphy_apb_wr(0x20008,0x258); /* DWC_DDRPHYA_MASTER0_CalUclkInfo_p0 */ - dwc_ddrphy_apb_wr(0x20088,0x9); /* DWC_DDRPHYA_MASTER0_CalRate */ - dwc_ddrphy_apb_wr(0x200b2,0x288); /* DWC_DDRPHYA_MASTER0_VrefInGlobal_p0 */ - dwc_ddrphy_apb_wr(0x10043,0x5b1); /* DWC_DDRPHYA_DBYTE0_DqDqsRcvCntrl_b0_p0 */ - dwc_ddrphy_apb_wr(0x10143,0x5b1); /* DWC_DDRPHYA_DBYTE0_DqDqsRcvCntrl_b1_p0 */ - dwc_ddrphy_apb_wr(0x11043,0x5b1); /* DWC_DDRPHYA_DBYTE1_DqDqsRcvCntrl_b0_p0 */ - dwc_ddrphy_apb_wr(0x11143,0x5b1); /* DWC_DDRPHYA_DBYTE1_DqDqsRcvCntrl_b1_p0 */ - dwc_ddrphy_apb_wr(0x12043,0x5b1); /* DWC_DDRPHYA_DBYTE2_DqDqsRcvCntrl_b0_p0 */ - dwc_ddrphy_apb_wr(0x12143,0x5b1); /* DWC_DDRPHYA_DBYTE2_DqDqsRcvCntrl_b1_p0 */ - dwc_ddrphy_apb_wr(0x13043,0x5b1); /* DWC_DDRPHYA_DBYTE3_DqDqsRcvCntrl_b0_p0 */ - dwc_ddrphy_apb_wr(0x13143,0x5b1); /* DWC_DDRPHYA_DBYTE3_DqDqsRcvCntrl_b1_p0 */ - dwc_ddrphy_apb_wr(0x200fa,0x1); /* DWC_DDRPHYA_MASTER0_DfiFreqRatio_p0 */ - dwc_ddrphy_apb_wr(0x20019,0x5); /* DWC_DDRPHYA_MASTER0_TristateModeCA_p0 */ - dwc_ddrphy_apb_wr(0x200f0,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat0 */ - dwc_ddrphy_apb_wr(0x200f1,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat1 */ - dwc_ddrphy_apb_wr(0x200f2,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat2 */ - dwc_ddrphy_apb_wr(0x200f3,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat3 */ - dwc_ddrphy_apb_wr(0x200f4,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat4 */ - dwc_ddrphy_apb_wr(0x200f5,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat5 */ - dwc_ddrphy_apb_wr(0x200f6,0x5555); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat6 */ - dwc_ddrphy_apb_wr(0x200f7,0xf000); /* DWC_DDRPHYA_MASTER0_DfiFreqXlat7 */ - dwc_ddrphy_apb_wr(0x2000b,0x4c); /* DWC_DDRPHYA_MASTER0_Seq0BDLY0_p0 */ - dwc_ddrphy_apb_wr(0x2000c,0x97); /* DWC_DDRPHYA_MASTER0_Seq0BDLY1_p0 */ - dwc_ddrphy_apb_wr(0x2000d,0x5dd); /* DWC_DDRPHYA_MASTER0_Seq0BDLY2_p0 */ - dwc_ddrphy_apb_wr(0x2000e,0x2c); /* DWC_DDRPHYA_MASTER0_Seq0BDLY3_p0 */ - dwc_ddrphy_apb_wr(0x20025,0x0); /* DWC_DDRPHYA_MASTER0_MasterX4Config */ - dwc_ddrphy_apb_wr(0x2002d,0x0); /* DWC_DDRPHYA_MASTER0_DMIPinPresent_p0 */ - dwc_ddrphy_apb_wr(0x20060,0x2); /* DWC_DDRPHYA_MASTER0_MemResetL */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0x54000,0x80);/* should be 0x80 in silicon */ - dwc_ddrphy_apb_wr(0x54001,0x0); - dwc_ddrphy_apb_wr(0x54002,0x0); - dwc_ddrphy_apb_wr(0x54003,0x960); - dwc_ddrphy_apb_wr(0x54004,0x2); - - dwc_ddrphy_apb_wr(0x54005,((PHY_RON<<8)|(PHY_RTT<<0))/*0x2830*/); - dwc_ddrphy_apb_wr(0x54006,(0x200|PHYREF_VALUE)/*0x23b*/); - dwc_ddrphy_apb_wr(0x54007,0x2000); - - dwc_ddrphy_apb_wr(0x54008,0x303); /* Two ranks */ - - dwc_ddrphy_apb_wr(0x54009,0x200);/* no addr mirror, 0x200 addr mirror */ - dwc_ddrphy_apb_wr(0x5400a,0x0); - dwc_ddrphy_apb_wr(0x5400b,0x31f);/* should be 0x31f in silicon */ - - dwc_ddrphy_apb_wr(0x5400c,0xc8); /* 0xc8 indicates stage completion messages showed */ - - dwc_ddrphy_apb_wr(0x5400d,0x0); - dwc_ddrphy_apb_wr(0x5400e,0x0); - dwc_ddrphy_apb_wr(0x5400f,0x0); - dwc_ddrphy_apb_wr(0x54010,0x0); - dwc_ddrphy_apb_wr(0x54011,0x0); - dwc_ddrphy_apb_wr(0x54012,0x1); - dwc_ddrphy_apb_wr(0x54013,0x0); - dwc_ddrphy_apb_wr(0x54014,0x0); - dwc_ddrphy_apb_wr(0x54015,0x0); - dwc_ddrphy_apb_wr(0x54016,0x0); - dwc_ddrphy_apb_wr(0x54017,0x0); - dwc_ddrphy_apb_wr(0x54018,0x0); - dwc_ddrphy_apb_wr(0x54019,0x0); - dwc_ddrphy_apb_wr(0x5401a,0x0); - dwc_ddrphy_apb_wr(0x5401b,0x0); - dwc_ddrphy_apb_wr(0x5401c,0x0); - dwc_ddrphy_apb_wr(0x5401d,0x0); - dwc_ddrphy_apb_wr(0x5401e,0x0); - dwc_ddrphy_apb_wr(0x5401f,0x0); - dwc_ddrphy_apb_wr(0x54020,0x0); - dwc_ddrphy_apb_wr(0x54021,0x0); - dwc_ddrphy_apb_wr(0x54022,0x0); - dwc_ddrphy_apb_wr(0x54023,0x0); - dwc_ddrphy_apb_wr(0x54024,0x0); - dwc_ddrphy_apb_wr(0x54025,0x0); - dwc_ddrphy_apb_wr(0x54026,0x0); - dwc_ddrphy_apb_wr(0x54027,0x0); - dwc_ddrphy_apb_wr(0x54028,0x0); - dwc_ddrphy_apb_wr(0x54029,0x0); - dwc_ddrphy_apb_wr(0x5402a,0x0); - dwc_ddrphy_apb_wr(0x5402b,0x0); - dwc_ddrphy_apb_wr(0x5402c,0x0); - dwc_ddrphy_apb_wr(0x5402d,0x0); - dwc_ddrphy_apb_wr(0x5402e,0x0); - - dwc_ddrphy_apb_wr(0x5402f,0xa30);/* MR0 */ - dwc_ddrphy_apb_wr(0x54030, ((DDR_RTT<<8)|(DDR_RON<<1)|0x1)/*0x1*/);/* MR1 */ - dwc_ddrphy_apb_wr(0x54031,0x1018);/* MR2 */ - dwc_ddrphy_apb_wr(0x54032,0x240);/* MR3 */ - dwc_ddrphy_apb_wr(0x54033,0xa00);/* MR4 */ - dwc_ddrphy_apb_wr(0x54034,0x42);/* MR5 */ - dwc_ddrphy_apb_wr(0x54035,(0x800|MR6_VALUE)/*0x800*/);/* MR6 */ - - reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*(0x54030)); - reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4*(0x54035)); - - dwc_ddrphy_apb_wr(0x54036,0x103); - dwc_ddrphy_apb_wr(0x54037,0x0); - dwc_ddrphy_apb_wr(0x54038,0x0); - dwc_ddrphy_apb_wr(0x54039,0x0); - dwc_ddrphy_apb_wr(0x5403a,0x0); - dwc_ddrphy_apb_wr(0x5403b,0x0); - dwc_ddrphy_apb_wr(0x5403c,0x0); - dwc_ddrphy_apb_wr(0x5403d,0x0); - dwc_ddrphy_apb_wr(0x5403e,0x0); - dwc_ddrphy_apb_wr(0x5403f,0x1221); - dwc_ddrphy_apb_wr(0x54040,0x0); - dwc_ddrphy_apb_wr(0x54041,0x0); - dwc_ddrphy_apb_wr(0x54042,0x0); - dwc_ddrphy_apb_wr(0x54043,0x0); - dwc_ddrphy_apb_wr(0x54044,0x0); - dwc_ddrphy_apb_wr(0x54045,0x0); - dwc_ddrphy_apb_wr(0x54046,0x0); - dwc_ddrphy_apb_wr(0x54047,0x0); - dwc_ddrphy_apb_wr(0x54048,0x0); - dwc_ddrphy_apb_wr(0x54049,0x0); - dwc_ddrphy_apb_wr(0x5404a,0x0); - dwc_ddrphy_apb_wr(0x5404b,0x0); - dwc_ddrphy_apb_wr(0x5404c,0x0); - dwc_ddrphy_apb_wr(0x5404d,0x0); - dwc_ddrphy_apb_wr(0x5404e,0x0); - dwc_ddrphy_apb_wr(0x5404f,0x0); - dwc_ddrphy_apb_wr(0x54050,0x0); - dwc_ddrphy_apb_wr(0x54051,0x0); - dwc_ddrphy_apb_wr(0x54052,0x0); - dwc_ddrphy_apb_wr(0x54053,0x0); - dwc_ddrphy_apb_wr(0x54054,0x0); - dwc_ddrphy_apb_wr(0x54055,0x0); - dwc_ddrphy_apb_wr(0x54056,0x0); - dwc_ddrphy_apb_wr(0x54057,0x0); - dwc_ddrphy_apb_wr(0x54058,0x0); - dwc_ddrphy_apb_wr(0x54059,0x0); - dwc_ddrphy_apb_wr(0x5405a,0x0); - dwc_ddrphy_apb_wr(0x5405b,0x0); - dwc_ddrphy_apb_wr(0x5405c,0x0); - dwc_ddrphy_apb_wr(0x5405d,0x0); - dwc_ddrphy_apb_wr(0x5405e,0x0); - dwc_ddrphy_apb_wr(0x5405f,0x0); - dwc_ddrphy_apb_wr(0x54060,0x0); - dwc_ddrphy_apb_wr(0x54061,0x0); - dwc_ddrphy_apb_wr(0x54062,0x0); - dwc_ddrphy_apb_wr(0x54063,0x0); - dwc_ddrphy_apb_wr(0x54064,0x0); - dwc_ddrphy_apb_wr(0x54065,0x0); - dwc_ddrphy_apb_wr(0x54066,0x0); - dwc_ddrphy_apb_wr(0x54067,0x0); - dwc_ddrphy_apb_wr(0x54068,0x0); - dwc_ddrphy_apb_wr(0x54069,0x0); - dwc_ddrphy_apb_wr(0x5406a,0x0); - dwc_ddrphy_apb_wr(0x5406b,0x0); - dwc_ddrphy_apb_wr(0x5406c,0x0); - dwc_ddrphy_apb_wr(0x5406d,0x0); - dwc_ddrphy_apb_wr(0x5406e,0x0); - dwc_ddrphy_apb_wr(0x5406f,0x0); - dwc_ddrphy_apb_wr(0x54070,0x0); - dwc_ddrphy_apb_wr(0x54071,0x0); - dwc_ddrphy_apb_wr(0x54072,0x0); - dwc_ddrphy_apb_wr(0x54073,0x0); - dwc_ddrphy_apb_wr(0x54074,0x0); - dwc_ddrphy_apb_wr(0x54075,0x0); - dwc_ddrphy_apb_wr(0x54076,0x0); - dwc_ddrphy_apb_wr(0x54077,0x0); - dwc_ddrphy_apb_wr(0x54078,0x0); - dwc_ddrphy_apb_wr(0x54079,0x0); - dwc_ddrphy_apb_wr(0x5407a,0x0); - dwc_ddrphy_apb_wr(0x5407b,0x0); - dwc_ddrphy_apb_wr(0x5407c,0x0); - dwc_ddrphy_apb_wr(0x5407d,0x0); - dwc_ddrphy_apb_wr(0x5407e,0x0); - dwc_ddrphy_apb_wr(0x5407f,0x0); - dwc_ddrphy_apb_wr(0x54080,0x0); - dwc_ddrphy_apb_wr(0x54081,0x0); - dwc_ddrphy_apb_wr(0x54082,0x0); - dwc_ddrphy_apb_wr(0x54083,0x0); - dwc_ddrphy_apb_wr(0x54084,0x0); - dwc_ddrphy_apb_wr(0x54085,0x0); - dwc_ddrphy_apb_wr(0x54086,0x0); - dwc_ddrphy_apb_wr(0x54087,0x0); - dwc_ddrphy_apb_wr(0x54088,0x0); - dwc_ddrphy_apb_wr(0x54089,0x0); - dwc_ddrphy_apb_wr(0x5408a,0x0); - dwc_ddrphy_apb_wr(0x5408b,0x0); - dwc_ddrphy_apb_wr(0x5408c,0x0); - dwc_ddrphy_apb_wr(0x5408d,0x0); - dwc_ddrphy_apb_wr(0x5408e,0x0); - dwc_ddrphy_apb_wr(0x5408f,0x0); - dwc_ddrphy_apb_wr(0x54090,0x0); - dwc_ddrphy_apb_wr(0x54091,0x0); - dwc_ddrphy_apb_wr(0x54092,0x0); - dwc_ddrphy_apb_wr(0x54093,0x0); - dwc_ddrphy_apb_wr(0x54094,0x0); - dwc_ddrphy_apb_wr(0x54095,0x0); - dwc_ddrphy_apb_wr(0x54096,0x0); - dwc_ddrphy_apb_wr(0x54097,0x0); - dwc_ddrphy_apb_wr(0x54098,0x0); - dwc_ddrphy_apb_wr(0x54099,0x0); - dwc_ddrphy_apb_wr(0x5409a,0x0); - dwc_ddrphy_apb_wr(0x5409b,0x0); - dwc_ddrphy_apb_wr(0x5409c,0x0); - dwc_ddrphy_apb_wr(0x5409d,0x0); - dwc_ddrphy_apb_wr(0x5409e,0x0); - dwc_ddrphy_apb_wr(0x5409f,0x0); - dwc_ddrphy_apb_wr(0x540a0,0x0); - dwc_ddrphy_apb_wr(0x540a1,0x0); - dwc_ddrphy_apb_wr(0x540a2,0x0); - dwc_ddrphy_apb_wr(0x540a3,0x0); - dwc_ddrphy_apb_wr(0x540a4,0x0); - dwc_ddrphy_apb_wr(0x540a5,0x0); - dwc_ddrphy_apb_wr(0x540a6,0x0); - dwc_ddrphy_apb_wr(0x540a7,0x0); - dwc_ddrphy_apb_wr(0x540a8,0x0); - dwc_ddrphy_apb_wr(0x540a9,0x0); - dwc_ddrphy_apb_wr(0x540aa,0x0); - dwc_ddrphy_apb_wr(0x540ab,0x0); - dwc_ddrphy_apb_wr(0x540ac,0x0); - dwc_ddrphy_apb_wr(0x540ad,0x0); - dwc_ddrphy_apb_wr(0x540ae,0x0); - dwc_ddrphy_apb_wr(0x540af,0x0); - dwc_ddrphy_apb_wr(0x540b0,0x0); - dwc_ddrphy_apb_wr(0x540b1,0x0); - dwc_ddrphy_apb_wr(0x540b2,0x0); - dwc_ddrphy_apb_wr(0x540b3,0x0); - dwc_ddrphy_apb_wr(0x540b4,0x0); - dwc_ddrphy_apb_wr(0x540b5,0x0); - dwc_ddrphy_apb_wr(0x540b6,0x0); - dwc_ddrphy_apb_wr(0x540b7,0x0); - dwc_ddrphy_apb_wr(0x540b8,0x0); - dwc_ddrphy_apb_wr(0x540b9,0x0); - dwc_ddrphy_apb_wr(0x540ba,0x0); - dwc_ddrphy_apb_wr(0x540bb,0x0); - dwc_ddrphy_apb_wr(0x540bc,0x0); - dwc_ddrphy_apb_wr(0x540bd,0x0); - dwc_ddrphy_apb_wr(0x540be,0x0); - dwc_ddrphy_apb_wr(0x540bf,0x0); - dwc_ddrphy_apb_wr(0x540c0,0x0); - dwc_ddrphy_apb_wr(0x540c1,0x0); - dwc_ddrphy_apb_wr(0x540c2,0x0); - dwc_ddrphy_apb_wr(0x540c3,0x0); - dwc_ddrphy_apb_wr(0x540c4,0x0); - dwc_ddrphy_apb_wr(0x540c5,0x0); - dwc_ddrphy_apb_wr(0x540c6,0x0); - dwc_ddrphy_apb_wr(0x540c7,0x0); - dwc_ddrphy_apb_wr(0x540c8,0x0); - dwc_ddrphy_apb_wr(0x540c9,0x0); - dwc_ddrphy_apb_wr(0x540ca,0x0); - dwc_ddrphy_apb_wr(0x540cb,0x0); - dwc_ddrphy_apb_wr(0x540cc,0x0); - dwc_ddrphy_apb_wr(0x540cd,0x0); - dwc_ddrphy_apb_wr(0x540ce,0x0); - dwc_ddrphy_apb_wr(0x540cf,0x0); - dwc_ddrphy_apb_wr(0x540d0,0x0); - dwc_ddrphy_apb_wr(0x540d1,0x0); - dwc_ddrphy_apb_wr(0x540d2,0x0); - dwc_ddrphy_apb_wr(0x540d3,0x0); - dwc_ddrphy_apb_wr(0x540d4,0x0); - dwc_ddrphy_apb_wr(0x540d5,0x0); - dwc_ddrphy_apb_wr(0x540d6,0x0); - dwc_ddrphy_apb_wr(0x540d7,0x0); - dwc_ddrphy_apb_wr(0x540d8,0x0); - dwc_ddrphy_apb_wr(0x540d9,0x0); - dwc_ddrphy_apb_wr(0x540da,0x0); - dwc_ddrphy_apb_wr(0x540db,0x0); - dwc_ddrphy_apb_wr(0x540dc,0x0); - dwc_ddrphy_apb_wr(0x540dd,0x0); - dwc_ddrphy_apb_wr(0x540de,0x0); - dwc_ddrphy_apb_wr(0x540df,0x0); - dwc_ddrphy_apb_wr(0x540e0,0x0); - dwc_ddrphy_apb_wr(0x540e1,0x0); - dwc_ddrphy_apb_wr(0x540e2,0x0); - dwc_ddrphy_apb_wr(0x540e3,0x0); - dwc_ddrphy_apb_wr(0x540e4,0x0); - dwc_ddrphy_apb_wr(0x540e5,0x0); - dwc_ddrphy_apb_wr(0x540e6,0x0); - dwc_ddrphy_apb_wr(0x540e7,0x0); - dwc_ddrphy_apb_wr(0x540e8,0x0); - dwc_ddrphy_apb_wr(0x540e9,0x0); - dwc_ddrphy_apb_wr(0x540ea,0x0); - dwc_ddrphy_apb_wr(0x540eb,0x0); - dwc_ddrphy_apb_wr(0x540ec,0x0); - dwc_ddrphy_apb_wr(0x540ed,0x0); - dwc_ddrphy_apb_wr(0x540ee,0x0); - dwc_ddrphy_apb_wr(0x540ef,0x0); - dwc_ddrphy_apb_wr(0x540f0,0x0); - dwc_ddrphy_apb_wr(0x540f1,0x0); - dwc_ddrphy_apb_wr(0x540f2,0x0); - dwc_ddrphy_apb_wr(0x540f3,0x0); - dwc_ddrphy_apb_wr(0x540f4,0x0); - dwc_ddrphy_apb_wr(0x540f5,0x0); - dwc_ddrphy_apb_wr(0x540f6,0x0); - dwc_ddrphy_apb_wr(0x540f7,0x0); - dwc_ddrphy_apb_wr(0x540f8,0x0); - dwc_ddrphy_apb_wr(0x540f9,0x0); - dwc_ddrphy_apb_wr(0x540fa,0x0); - dwc_ddrphy_apb_wr(0x540fb,0x0); - dwc_ddrphy_apb_wr(0x540fc,0x0); - dwc_ddrphy_apb_wr(0x540fd,0x0); - dwc_ddrphy_apb_wr(0x540fe,0x0); - dwc_ddrphy_apb_wr(0x540ff,0x0); - dwc_ddrphy_apb_wr(0x54100,0x0); - dwc_ddrphy_apb_wr(0x54101,0x0); - dwc_ddrphy_apb_wr(0x54102,0x0); - dwc_ddrphy_apb_wr(0x54103,0x0); - dwc_ddrphy_apb_wr(0x54104,0x0); - dwc_ddrphy_apb_wr(0x54105,0x0); - dwc_ddrphy_apb_wr(0x54106,0x0); - dwc_ddrphy_apb_wr(0x54107,0x0); - dwc_ddrphy_apb_wr(0x54108,0x0); - dwc_ddrphy_apb_wr(0x54109,0x0); - dwc_ddrphy_apb_wr(0x5410a,0x0); - dwc_ddrphy_apb_wr(0x5410b,0x0); - dwc_ddrphy_apb_wr(0x5410c,0x0); - dwc_ddrphy_apb_wr(0x5410d,0x0); - dwc_ddrphy_apb_wr(0x5410e,0x0); - dwc_ddrphy_apb_wr(0x5410f,0x0); - dwc_ddrphy_apb_wr(0x54110,0x0); - dwc_ddrphy_apb_wr(0x54111,0x0); - dwc_ddrphy_apb_wr(0x54112,0x0); - dwc_ddrphy_apb_wr(0x54113,0x0); - dwc_ddrphy_apb_wr(0x54114,0x0); - dwc_ddrphy_apb_wr(0x54115,0x0); - dwc_ddrphy_apb_wr(0x54116,0x0); - dwc_ddrphy_apb_wr(0x54117,0x0); - dwc_ddrphy_apb_wr(0x54118,0x0); - dwc_ddrphy_apb_wr(0x54119,0x0); - dwc_ddrphy_apb_wr(0x5411a,0x0); - dwc_ddrphy_apb_wr(0x5411b,0x0); - dwc_ddrphy_apb_wr(0x5411c,0x0); - dwc_ddrphy_apb_wr(0x5411d,0x0); - dwc_ddrphy_apb_wr(0x5411e,0x0); - dwc_ddrphy_apb_wr(0x5411f,0x0); - dwc_ddrphy_apb_wr(0x54120,0x0); - dwc_ddrphy_apb_wr(0x54121,0x0); - dwc_ddrphy_apb_wr(0x54122,0x0); - dwc_ddrphy_apb_wr(0x54123,0x0); - dwc_ddrphy_apb_wr(0x54124,0x0); - dwc_ddrphy_apb_wr(0x54125,0x0); - dwc_ddrphy_apb_wr(0x54126,0x0); - dwc_ddrphy_apb_wr(0x54127,0x0); - dwc_ddrphy_apb_wr(0x54128,0x0); - dwc_ddrphy_apb_wr(0x54129,0x0); - dwc_ddrphy_apb_wr(0x5412a,0x0); - dwc_ddrphy_apb_wr(0x5412b,0x0); - dwc_ddrphy_apb_wr(0x5412c,0x0); - dwc_ddrphy_apb_wr(0x5412d,0x0); - dwc_ddrphy_apb_wr(0x5412e,0x0); - dwc_ddrphy_apb_wr(0x5412f,0x0); - dwc_ddrphy_apb_wr(0x54130,0x0); - dwc_ddrphy_apb_wr(0x54131,0x0); - dwc_ddrphy_apb_wr(0x54132,0x0); - dwc_ddrphy_apb_wr(0x54133,0x0); - dwc_ddrphy_apb_wr(0x54134,0x0); - dwc_ddrphy_apb_wr(0x54135,0x0); - dwc_ddrphy_apb_wr(0x54136,0x0); - dwc_ddrphy_apb_wr(0x54137,0x0); - dwc_ddrphy_apb_wr(0x54138,0x0); - dwc_ddrphy_apb_wr(0x54139,0x0); - dwc_ddrphy_apb_wr(0x5413a,0x0); - dwc_ddrphy_apb_wr(0x5413b,0x0); - dwc_ddrphy_apb_wr(0x5413c,0x0); - dwc_ddrphy_apb_wr(0x5413d,0x0); - dwc_ddrphy_apb_wr(0x5413e,0x0); - dwc_ddrphy_apb_wr(0x5413f,0x0); - dwc_ddrphy_apb_wr(0x54140,0x0); - dwc_ddrphy_apb_wr(0x54141,0x0); - dwc_ddrphy_apb_wr(0x54142,0x0); - dwc_ddrphy_apb_wr(0x54143,0x0); - dwc_ddrphy_apb_wr(0x54144,0x0); - dwc_ddrphy_apb_wr(0x54145,0x0); - dwc_ddrphy_apb_wr(0x54146,0x0); - dwc_ddrphy_apb_wr(0x54147,0x0); - dwc_ddrphy_apb_wr(0x54148,0x0); - dwc_ddrphy_apb_wr(0x54149,0x0); - dwc_ddrphy_apb_wr(0x5414a,0x0); - dwc_ddrphy_apb_wr(0x5414b,0x0); - dwc_ddrphy_apb_wr(0x5414c,0x0); - dwc_ddrphy_apb_wr(0x5414d,0x0); - dwc_ddrphy_apb_wr(0x5414e,0x0); - dwc_ddrphy_apb_wr(0x5414f,0x0); - dwc_ddrphy_apb_wr(0x54150,0x0); - dwc_ddrphy_apb_wr(0x54151,0x0); - dwc_ddrphy_apb_wr(0x54152,0x0); - dwc_ddrphy_apb_wr(0x54153,0x0); - dwc_ddrphy_apb_wr(0x54154,0x0); - dwc_ddrphy_apb_wr(0x54155,0x0); - dwc_ddrphy_apb_wr(0x54156,0x0); - dwc_ddrphy_apb_wr(0x54157,0x0); - dwc_ddrphy_apb_wr(0x54158,0x0); - dwc_ddrphy_apb_wr(0x54159,0x0); - dwc_ddrphy_apb_wr(0x5415a,0x0); - dwc_ddrphy_apb_wr(0x5415b,0x0); - dwc_ddrphy_apb_wr(0x5415c,0x0); - dwc_ddrphy_apb_wr(0x5415d,0x0); - dwc_ddrphy_apb_wr(0x5415e,0x0); - dwc_ddrphy_apb_wr(0x5415f,0x0); - dwc_ddrphy_apb_wr(0x54160,0x0); - dwc_ddrphy_apb_wr(0x54161,0x0); - dwc_ddrphy_apb_wr(0x54162,0x0); - dwc_ddrphy_apb_wr(0x54163,0x0); - dwc_ddrphy_apb_wr(0x54164,0x0); - dwc_ddrphy_apb_wr(0x54165,0x0); - dwc_ddrphy_apb_wr(0x54166,0x0); - dwc_ddrphy_apb_wr(0x54167,0x0); - dwc_ddrphy_apb_wr(0x54168,0x0); - dwc_ddrphy_apb_wr(0x54169,0x0); - dwc_ddrphy_apb_wr(0x5416a,0x0); - dwc_ddrphy_apb_wr(0x5416b,0x0); - dwc_ddrphy_apb_wr(0x5416c,0x0); - dwc_ddrphy_apb_wr(0x5416d,0x0); - dwc_ddrphy_apb_wr(0x5416e,0x0); - dwc_ddrphy_apb_wr(0x5416f,0x0); - dwc_ddrphy_apb_wr(0x54170,0x0); - dwc_ddrphy_apb_wr(0x54171,0x0); - dwc_ddrphy_apb_wr(0x54172,0x0); - dwc_ddrphy_apb_wr(0x54173,0x0); - dwc_ddrphy_apb_wr(0x54174,0x0); - dwc_ddrphy_apb_wr(0x54175,0x0); - dwc_ddrphy_apb_wr(0x54176,0x0); - dwc_ddrphy_apb_wr(0x54177,0x0); - dwc_ddrphy_apb_wr(0x54178,0x0); - dwc_ddrphy_apb_wr(0x54179,0x0); - dwc_ddrphy_apb_wr(0x5417a,0x0); - dwc_ddrphy_apb_wr(0x5417b,0x0); - dwc_ddrphy_apb_wr(0x5417c,0x0); - dwc_ddrphy_apb_wr(0x5417d,0x0); - dwc_ddrphy_apb_wr(0x5417e,0x0); - dwc_ddrphy_apb_wr(0x5417f,0x0); - dwc_ddrphy_apb_wr(0x54180,0x0); - dwc_ddrphy_apb_wr(0x54181,0x0); - dwc_ddrphy_apb_wr(0x54182,0x0); - dwc_ddrphy_apb_wr(0x54183,0x0); - dwc_ddrphy_apb_wr(0x54184,0x0); - dwc_ddrphy_apb_wr(0x54185,0x0); - dwc_ddrphy_apb_wr(0x54186,0x0); - dwc_ddrphy_apb_wr(0x54187,0x0); - dwc_ddrphy_apb_wr(0x54188,0x0); - dwc_ddrphy_apb_wr(0x54189,0x0); - dwc_ddrphy_apb_wr(0x5418a,0x0); - dwc_ddrphy_apb_wr(0x5418b,0x0); - dwc_ddrphy_apb_wr(0x5418c,0x0); - dwc_ddrphy_apb_wr(0x5418d,0x0); - dwc_ddrphy_apb_wr(0x5418e,0x0); - dwc_ddrphy_apb_wr(0x5418f,0x0); - dwc_ddrphy_apb_wr(0x54190,0x0); - dwc_ddrphy_apb_wr(0x54191,0x0); - dwc_ddrphy_apb_wr(0x54192,0x0); - dwc_ddrphy_apb_wr(0x54193,0x0); - dwc_ddrphy_apb_wr(0x54194,0x0); - dwc_ddrphy_apb_wr(0x54195,0x0); - dwc_ddrphy_apb_wr(0x54196,0x0); - dwc_ddrphy_apb_wr(0x54197,0x0); - dwc_ddrphy_apb_wr(0x54198,0x0); - dwc_ddrphy_apb_wr(0x54199,0x0); - dwc_ddrphy_apb_wr(0x5419a,0x0); - dwc_ddrphy_apb_wr(0x5419b,0x0); - dwc_ddrphy_apb_wr(0x5419c,0x0); - dwc_ddrphy_apb_wr(0x5419d,0x0); - dwc_ddrphy_apb_wr(0x5419e,0x0); - dwc_ddrphy_apb_wr(0x5419f,0x0); - dwc_ddrphy_apb_wr(0x541a0,0x0); - dwc_ddrphy_apb_wr(0x541a1,0x0); - dwc_ddrphy_apb_wr(0x541a2,0x0); - dwc_ddrphy_apb_wr(0x541a3,0x0); - dwc_ddrphy_apb_wr(0x541a4,0x0); - dwc_ddrphy_apb_wr(0x541a5,0x0); - dwc_ddrphy_apb_wr(0x541a6,0x0); - dwc_ddrphy_apb_wr(0x541a7,0x0); - dwc_ddrphy_apb_wr(0x541a8,0x0); - dwc_ddrphy_apb_wr(0x541a9,0x0); - dwc_ddrphy_apb_wr(0x541aa,0x0); - dwc_ddrphy_apb_wr(0x541ab,0x0); - dwc_ddrphy_apb_wr(0x541ac,0x0); - dwc_ddrphy_apb_wr(0x541ad,0x0); - dwc_ddrphy_apb_wr(0x541ae,0x0); - dwc_ddrphy_apb_wr(0x541af,0x0); - dwc_ddrphy_apb_wr(0x541b0,0x0); - dwc_ddrphy_apb_wr(0x541b1,0x0); - dwc_ddrphy_apb_wr(0x541b2,0x0); - dwc_ddrphy_apb_wr(0x541b3,0x0); - dwc_ddrphy_apb_wr(0x541b4,0x0); - dwc_ddrphy_apb_wr(0x541b5,0x0); - dwc_ddrphy_apb_wr(0x541b6,0x0); - dwc_ddrphy_apb_wr(0x541b7,0x0); - dwc_ddrphy_apb_wr(0x541b8,0x0); - dwc_ddrphy_apb_wr(0x541b9,0x0); - dwc_ddrphy_apb_wr(0x541ba,0x0); - dwc_ddrphy_apb_wr(0x541bb,0x0); - dwc_ddrphy_apb_wr(0x541bc,0x0); - dwc_ddrphy_apb_wr(0x541bd,0x0); - dwc_ddrphy_apb_wr(0x541be,0x0); - dwc_ddrphy_apb_wr(0x541bf,0x0); - dwc_ddrphy_apb_wr(0x541c0,0x0); - dwc_ddrphy_apb_wr(0x541c1,0x0); - dwc_ddrphy_apb_wr(0x541c2,0x0); - dwc_ddrphy_apb_wr(0x541c3,0x0); - dwc_ddrphy_apb_wr(0x541c4,0x0); - dwc_ddrphy_apb_wr(0x541c5,0x0); - dwc_ddrphy_apb_wr(0x541c6,0x0); - dwc_ddrphy_apb_wr(0x541c7,0x0); - dwc_ddrphy_apb_wr(0x541c8,0x0); - dwc_ddrphy_apb_wr(0x541c9,0x0); - dwc_ddrphy_apb_wr(0x541ca,0x0); - dwc_ddrphy_apb_wr(0x541cb,0x0); - dwc_ddrphy_apb_wr(0x541cc,0x0); - dwc_ddrphy_apb_wr(0x541cd,0x0); - dwc_ddrphy_apb_wr(0x541ce,0x0); - dwc_ddrphy_apb_wr(0x541cf,0x0); - dwc_ddrphy_apb_wr(0x541d0,0x0); - dwc_ddrphy_apb_wr(0x541d1,0x0); - dwc_ddrphy_apb_wr(0x541d2,0x0); - dwc_ddrphy_apb_wr(0x541d3,0x0); - dwc_ddrphy_apb_wr(0x541d4,0x0); - dwc_ddrphy_apb_wr(0x541d5,0x0); - dwc_ddrphy_apb_wr(0x541d6,0x0); - dwc_ddrphy_apb_wr(0x541d7,0x0); - dwc_ddrphy_apb_wr(0x541d8,0x0); - dwc_ddrphy_apb_wr(0x541d9,0x0); - dwc_ddrphy_apb_wr(0x541da,0x0); - dwc_ddrphy_apb_wr(0x541db,0x0); - dwc_ddrphy_apb_wr(0x541dc,0x0); - dwc_ddrphy_apb_wr(0x541dd,0x0); - dwc_ddrphy_apb_wr(0x541de,0x0); - dwc_ddrphy_apb_wr(0x541df,0x0); - dwc_ddrphy_apb_wr(0x541e0,0x0); - dwc_ddrphy_apb_wr(0x541e1,0x0); - dwc_ddrphy_apb_wr(0x541e2,0x0); - dwc_ddrphy_apb_wr(0x541e3,0x0); - dwc_ddrphy_apb_wr(0x541e4,0x0); - dwc_ddrphy_apb_wr(0x541e5,0x0); - dwc_ddrphy_apb_wr(0x541e6,0x0); - dwc_ddrphy_apb_wr(0x541e7,0x0); - dwc_ddrphy_apb_wr(0x541e8,0x0); - dwc_ddrphy_apb_wr(0x541e9,0x0); - dwc_ddrphy_apb_wr(0x541ea,0x0); - dwc_ddrphy_apb_wr(0x541eb,0x0); - dwc_ddrphy_apb_wr(0x541ec,0x0); - dwc_ddrphy_apb_wr(0x541ed,0x0); - dwc_ddrphy_apb_wr(0x541ee,0x0); - dwc_ddrphy_apb_wr(0x541ef,0x0); - dwc_ddrphy_apb_wr(0x541f0,0x0); - dwc_ddrphy_apb_wr(0x541f1,0x0); - dwc_ddrphy_apb_wr(0x541f2,0x0); - dwc_ddrphy_apb_wr(0x541f3,0x0); - dwc_ddrphy_apb_wr(0x541f4,0x0); - dwc_ddrphy_apb_wr(0x541f5,0x0); - dwc_ddrphy_apb_wr(0x541f6,0x0); - dwc_ddrphy_apb_wr(0x541f7,0x0); - dwc_ddrphy_apb_wr(0x541f8,0x0); - dwc_ddrphy_apb_wr(0x541f9,0x0); - dwc_ddrphy_apb_wr(0x541fa,0x0); - dwc_ddrphy_apb_wr(0x541fb,0x0); - dwc_ddrphy_apb_wr(0x541fc,0x100); - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0099,0x9); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - dwc_ddrphy_apb_wr(0xd0099,0x1); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - dwc_ddrphy_apb_wr(0xd0099,0x0); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - - wait_ddrphy_training_complete(); - - dwc_ddrphy_apb_wr(0xd0099,0x1); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - - ddr_load_train_code(FW_2D_IMAGE); - - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0x54000,0x80);/* should be 0x80 in silicon */ - dwc_ddrphy_apb_wr(0x54001,0x0); - dwc_ddrphy_apb_wr(0x54002,0x0); - dwc_ddrphy_apb_wr(0x54003,0x960); - dwc_ddrphy_apb_wr(0x54004,0x2); - - dwc_ddrphy_apb_wr(0x54005,((PHY_RON<<8)|(PHY_RTT<<0))/*0x2830*/); - dwc_ddrphy_apb_wr(0x54006,(0x200|PHYREF_VALUE)/*0x23b*/); - dwc_ddrphy_apb_wr(0x54007,0x2000); - - dwc_ddrphy_apb_wr(0x54008,0x303); - - dwc_ddrphy_apb_wr(0x54009,0x200); - dwc_ddrphy_apb_wr(0x5400a,0x0); - dwc_ddrphy_apb_wr(0x5400b,0x61);/* should be 0x61 in silicon */ - - dwc_ddrphy_apb_wr(0x5400c,0xc8); /* 0xc8 indicates stage completion messages showed */ - - dwc_ddrphy_apb_wr(0x5400d,0x0); - dwc_ddrphy_apb_wr(0x5400e,0x8020); - dwc_ddrphy_apb_wr(0x5400f,0x0); - dwc_ddrphy_apb_wr(0x54010,0x0); - dwc_ddrphy_apb_wr(0x54011,0x0); - dwc_ddrphy_apb_wr(0x54012,0x1); - dwc_ddrphy_apb_wr(0x54013,0x0); - dwc_ddrphy_apb_wr(0x54014,0x0); - dwc_ddrphy_apb_wr(0x54015,0x0); - dwc_ddrphy_apb_wr(0x54016,0x0); - dwc_ddrphy_apb_wr(0x54017,0x0); - dwc_ddrphy_apb_wr(0x54018,0x0); - dwc_ddrphy_apb_wr(0x54019,0x0); - dwc_ddrphy_apb_wr(0x5401a,0x0); - dwc_ddrphy_apb_wr(0x5401b,0x0); - dwc_ddrphy_apb_wr(0x5401c,0x0); - dwc_ddrphy_apb_wr(0x5401d,0x0); - dwc_ddrphy_apb_wr(0x5401e,0x0); - dwc_ddrphy_apb_wr(0x5401f,0x0); - dwc_ddrphy_apb_wr(0x54020,0x0); - dwc_ddrphy_apb_wr(0x54021,0x0); - dwc_ddrphy_apb_wr(0x54022,0x0); - dwc_ddrphy_apb_wr(0x54023,0x0); - dwc_ddrphy_apb_wr(0x54024,0x0); - dwc_ddrphy_apb_wr(0x54025,0x0); - dwc_ddrphy_apb_wr(0x54026,0x0); - dwc_ddrphy_apb_wr(0x54027,0x0); - dwc_ddrphy_apb_wr(0x54028,0x0); - dwc_ddrphy_apb_wr(0x54029,0x0); - dwc_ddrphy_apb_wr(0x5402a,0x0); - dwc_ddrphy_apb_wr(0x5402b,0x0); - dwc_ddrphy_apb_wr(0x5402c,0x0); - dwc_ddrphy_apb_wr(0x5402d,0x0); - dwc_ddrphy_apb_wr(0x5402e,0x0); - - dwc_ddrphy_apb_wr(0x5402f,0xa30);/* MR0 */ - dwc_ddrphy_apb_wr(0x54030, ((DDR_RTT<<8)|(DDR_RON<<1)|0x1)/*0x1*/);/* MR1 */ - dwc_ddrphy_apb_wr(0x54031,0x1018);/* MR2 */ - dwc_ddrphy_apb_wr(0x54032,0x240);/* MR3 */ - dwc_ddrphy_apb_wr(0x54033,0xa00);/* MR4 */ - dwc_ddrphy_apb_wr(0x54034,0x42);/* MR5 */ - dwc_ddrphy_apb_wr(0x54035,(0x800|MR6_VALUE)/*0x800*/);/* MR6 */ - - dwc_ddrphy_apb_wr(0x54036,0x103); - dwc_ddrphy_apb_wr(0x54037,0x0); - dwc_ddrphy_apb_wr(0x54038,0x0); - dwc_ddrphy_apb_wr(0x54039,0x0); - dwc_ddrphy_apb_wr(0x5403a,0x0); - dwc_ddrphy_apb_wr(0x5403b,0x0); - dwc_ddrphy_apb_wr(0x5403c,0x0); - dwc_ddrphy_apb_wr(0x5403d,0x0); - dwc_ddrphy_apb_wr(0x5403e,0x0); - dwc_ddrphy_apb_wr(0x5403f,0x1221); - dwc_ddrphy_apb_wr(0x54040,0x0); - dwc_ddrphy_apb_wr(0x54041,0x0); - dwc_ddrphy_apb_wr(0x54042,0x0); - dwc_ddrphy_apb_wr(0x54043,0x0); - dwc_ddrphy_apb_wr(0x54044,0x0); - dwc_ddrphy_apb_wr(0x54045,0x0); - dwc_ddrphy_apb_wr(0x54046,0x0); - dwc_ddrphy_apb_wr(0x54047,0x0); - dwc_ddrphy_apb_wr(0x54048,0x0); - dwc_ddrphy_apb_wr(0x54049,0x0); - dwc_ddrphy_apb_wr(0x5404a,0x0); - dwc_ddrphy_apb_wr(0x5404b,0x0); - dwc_ddrphy_apb_wr(0x5404c,0x0); - dwc_ddrphy_apb_wr(0x5404d,0x0); - dwc_ddrphy_apb_wr(0x5404e,0x0); - dwc_ddrphy_apb_wr(0x5404f,0x0); - dwc_ddrphy_apb_wr(0x54050,0x0); - dwc_ddrphy_apb_wr(0x54051,0x0); - dwc_ddrphy_apb_wr(0x54052,0x0); - dwc_ddrphy_apb_wr(0x54053,0x0); - dwc_ddrphy_apb_wr(0x54054,0x0); - dwc_ddrphy_apb_wr(0x54055,0x0); - dwc_ddrphy_apb_wr(0x54056,0x0); - dwc_ddrphy_apb_wr(0x54057,0x0); - dwc_ddrphy_apb_wr(0x54058,0x0); - dwc_ddrphy_apb_wr(0x54059,0x0); - dwc_ddrphy_apb_wr(0x5405a,0x0); - dwc_ddrphy_apb_wr(0x5405b,0x0); - dwc_ddrphy_apb_wr(0x5405c,0x0); - dwc_ddrphy_apb_wr(0x5405d,0x0); - dwc_ddrphy_apb_wr(0x5405e,0x0); - dwc_ddrphy_apb_wr(0x5405f,0x0); - dwc_ddrphy_apb_wr(0x54060,0x0); - dwc_ddrphy_apb_wr(0x54061,0x0); - dwc_ddrphy_apb_wr(0x54062,0x0); - dwc_ddrphy_apb_wr(0x54063,0x0); - dwc_ddrphy_apb_wr(0x54064,0x0); - dwc_ddrphy_apb_wr(0x54065,0x0); - dwc_ddrphy_apb_wr(0x54066,0x0); - dwc_ddrphy_apb_wr(0x54067,0x0); - dwc_ddrphy_apb_wr(0x54068,0x0); - dwc_ddrphy_apb_wr(0x54069,0x0); - dwc_ddrphy_apb_wr(0x5406a,0x0); - dwc_ddrphy_apb_wr(0x5406b,0x0); - dwc_ddrphy_apb_wr(0x5406c,0x0); - dwc_ddrphy_apb_wr(0x5406d,0x0); - dwc_ddrphy_apb_wr(0x5406e,0x0); - dwc_ddrphy_apb_wr(0x5406f,0x0); - dwc_ddrphy_apb_wr(0x54070,0x0); - dwc_ddrphy_apb_wr(0x54071,0x0); - dwc_ddrphy_apb_wr(0x54072,0x0); - dwc_ddrphy_apb_wr(0x54073,0x0); - dwc_ddrphy_apb_wr(0x54074,0x0); - dwc_ddrphy_apb_wr(0x54075,0x0); - dwc_ddrphy_apb_wr(0x54076,0x0); - dwc_ddrphy_apb_wr(0x54077,0x0); - dwc_ddrphy_apb_wr(0x54078,0x0); - dwc_ddrphy_apb_wr(0x54079,0x0); - dwc_ddrphy_apb_wr(0x5407a,0x0); - dwc_ddrphy_apb_wr(0x5407b,0x0); - dwc_ddrphy_apb_wr(0x5407c,0x0); - dwc_ddrphy_apb_wr(0x5407d,0x0); - dwc_ddrphy_apb_wr(0x5407e,0x0); - dwc_ddrphy_apb_wr(0x5407f,0x0); - dwc_ddrphy_apb_wr(0x54080,0x0); - dwc_ddrphy_apb_wr(0x54081,0x0); - dwc_ddrphy_apb_wr(0x54082,0x0); - dwc_ddrphy_apb_wr(0x54083,0x0); - dwc_ddrphy_apb_wr(0x54084,0x0); - dwc_ddrphy_apb_wr(0x54085,0x0); - dwc_ddrphy_apb_wr(0x54086,0x0); - dwc_ddrphy_apb_wr(0x54087,0x0); - dwc_ddrphy_apb_wr(0x54088,0x0); - dwc_ddrphy_apb_wr(0x54089,0x0); - dwc_ddrphy_apb_wr(0x5408a,0x0); - dwc_ddrphy_apb_wr(0x5408b,0x0); - dwc_ddrphy_apb_wr(0x5408c,0x0); - dwc_ddrphy_apb_wr(0x5408d,0x0); - dwc_ddrphy_apb_wr(0x5408e,0x0); - dwc_ddrphy_apb_wr(0x5408f,0x0); - dwc_ddrphy_apb_wr(0x54090,0x0); - dwc_ddrphy_apb_wr(0x54091,0x0); - dwc_ddrphy_apb_wr(0x54092,0x0); - dwc_ddrphy_apb_wr(0x54093,0x0); - dwc_ddrphy_apb_wr(0x54094,0x0); - dwc_ddrphy_apb_wr(0x54095,0x0); - dwc_ddrphy_apb_wr(0x54096,0x0); - dwc_ddrphy_apb_wr(0x54097,0x0); - dwc_ddrphy_apb_wr(0x54098,0x0); - dwc_ddrphy_apb_wr(0x54099,0x0); - dwc_ddrphy_apb_wr(0x5409a,0x0); - dwc_ddrphy_apb_wr(0x5409b,0x0); - dwc_ddrphy_apb_wr(0x5409c,0x0); - dwc_ddrphy_apb_wr(0x5409d,0x0); - dwc_ddrphy_apb_wr(0x5409e,0x0); - dwc_ddrphy_apb_wr(0x5409f,0x0); - dwc_ddrphy_apb_wr(0x540a0,0x0); - dwc_ddrphy_apb_wr(0x540a1,0x0); - dwc_ddrphy_apb_wr(0x540a2,0x0); - dwc_ddrphy_apb_wr(0x540a3,0x0); - dwc_ddrphy_apb_wr(0x540a4,0x0); - dwc_ddrphy_apb_wr(0x540a5,0x0); - dwc_ddrphy_apb_wr(0x540a6,0x0); - dwc_ddrphy_apb_wr(0x540a7,0x0); - dwc_ddrphy_apb_wr(0x540a8,0x0); - dwc_ddrphy_apb_wr(0x540a9,0x0); - dwc_ddrphy_apb_wr(0x540aa,0x0); - dwc_ddrphy_apb_wr(0x540ab,0x0); - dwc_ddrphy_apb_wr(0x540ac,0x0); - dwc_ddrphy_apb_wr(0x540ad,0x0); - dwc_ddrphy_apb_wr(0x540ae,0x0); - dwc_ddrphy_apb_wr(0x540af,0x0); - dwc_ddrphy_apb_wr(0x540b0,0x0); - dwc_ddrphy_apb_wr(0x540b1,0x0); - dwc_ddrphy_apb_wr(0x540b2,0x0); - dwc_ddrphy_apb_wr(0x540b3,0x0); - dwc_ddrphy_apb_wr(0x540b4,0x0); - dwc_ddrphy_apb_wr(0x540b5,0x0); - dwc_ddrphy_apb_wr(0x540b6,0x0); - dwc_ddrphy_apb_wr(0x540b7,0x0); - dwc_ddrphy_apb_wr(0x540b8,0x0); - dwc_ddrphy_apb_wr(0x540b9,0x0); - dwc_ddrphy_apb_wr(0x540ba,0x0); - dwc_ddrphy_apb_wr(0x540bb,0x0); - dwc_ddrphy_apb_wr(0x540bc,0x0); - dwc_ddrphy_apb_wr(0x540bd,0x0); - dwc_ddrphy_apb_wr(0x540be,0x0); - dwc_ddrphy_apb_wr(0x540bf,0x0); - dwc_ddrphy_apb_wr(0x540c0,0x0); - dwc_ddrphy_apb_wr(0x540c1,0x0); - dwc_ddrphy_apb_wr(0x540c2,0x0); - dwc_ddrphy_apb_wr(0x540c3,0x0); - dwc_ddrphy_apb_wr(0x540c4,0x0); - dwc_ddrphy_apb_wr(0x540c5,0x0); - dwc_ddrphy_apb_wr(0x540c6,0x0); - dwc_ddrphy_apb_wr(0x540c7,0x0); - dwc_ddrphy_apb_wr(0x540c8,0x0); - dwc_ddrphy_apb_wr(0x540c9,0x0); - dwc_ddrphy_apb_wr(0x540ca,0x0); - dwc_ddrphy_apb_wr(0x540cb,0x0); - dwc_ddrphy_apb_wr(0x540cc,0x0); - dwc_ddrphy_apb_wr(0x540cd,0x0); - dwc_ddrphy_apb_wr(0x540ce,0x0); - dwc_ddrphy_apb_wr(0x540cf,0x0); - dwc_ddrphy_apb_wr(0x540d0,0x0); - dwc_ddrphy_apb_wr(0x540d1,0x0); - dwc_ddrphy_apb_wr(0x540d2,0x0); - dwc_ddrphy_apb_wr(0x540d3,0x0); - dwc_ddrphy_apb_wr(0x540d4,0x0); - dwc_ddrphy_apb_wr(0x540d5,0x0); - dwc_ddrphy_apb_wr(0x540d6,0x0); - dwc_ddrphy_apb_wr(0x540d7,0x0); - dwc_ddrphy_apb_wr(0x540d8,0x0); - dwc_ddrphy_apb_wr(0x540d9,0x0); - dwc_ddrphy_apb_wr(0x540da,0x0); - dwc_ddrphy_apb_wr(0x540db,0x0); - dwc_ddrphy_apb_wr(0x540dc,0x0); - dwc_ddrphy_apb_wr(0x540dd,0x0); - dwc_ddrphy_apb_wr(0x540de,0x0); - dwc_ddrphy_apb_wr(0x540df,0x0); - dwc_ddrphy_apb_wr(0x540e0,0x0); - dwc_ddrphy_apb_wr(0x540e1,0x0); - dwc_ddrphy_apb_wr(0x540e2,0x0); - dwc_ddrphy_apb_wr(0x540e3,0x0); - dwc_ddrphy_apb_wr(0x540e4,0x0); - dwc_ddrphy_apb_wr(0x540e5,0x0); - dwc_ddrphy_apb_wr(0x540e6,0x0); - dwc_ddrphy_apb_wr(0x540e7,0x0); - dwc_ddrphy_apb_wr(0x540e8,0x0); - dwc_ddrphy_apb_wr(0x540e9,0x0); - dwc_ddrphy_apb_wr(0x540ea,0x0); - dwc_ddrphy_apb_wr(0x540eb,0x0); - dwc_ddrphy_apb_wr(0x540ec,0x0); - dwc_ddrphy_apb_wr(0x540ed,0x0); - dwc_ddrphy_apb_wr(0x540ee,0x0); - dwc_ddrphy_apb_wr(0x540ef,0x0); - dwc_ddrphy_apb_wr(0x540f0,0x0); - dwc_ddrphy_apb_wr(0x540f1,0x0); - dwc_ddrphy_apb_wr(0x540f2,0x0); - dwc_ddrphy_apb_wr(0x540f3,0x0); - dwc_ddrphy_apb_wr(0x540f4,0x0); - dwc_ddrphy_apb_wr(0x540f5,0x0); - dwc_ddrphy_apb_wr(0x540f6,0x0); - dwc_ddrphy_apb_wr(0x540f7,0x0); - dwc_ddrphy_apb_wr(0x540f8,0x0); - dwc_ddrphy_apb_wr(0x540f9,0x0); - dwc_ddrphy_apb_wr(0x540fa,0x0); - dwc_ddrphy_apb_wr(0x540fb,0x0); - dwc_ddrphy_apb_wr(0x540fc,0x0); - dwc_ddrphy_apb_wr(0x540fd,0x0); - dwc_ddrphy_apb_wr(0x540fe,0x0); - dwc_ddrphy_apb_wr(0x540ff,0x0); - dwc_ddrphy_apb_wr(0x54100,0x0); - dwc_ddrphy_apb_wr(0x54101,0x0); - dwc_ddrphy_apb_wr(0x54102,0x0); - dwc_ddrphy_apb_wr(0x54103,0x0); - dwc_ddrphy_apb_wr(0x54104,0x0); - dwc_ddrphy_apb_wr(0x54105,0x0); - dwc_ddrphy_apb_wr(0x54106,0x0); - dwc_ddrphy_apb_wr(0x54107,0x0); - dwc_ddrphy_apb_wr(0x54108,0x0); - dwc_ddrphy_apb_wr(0x54109,0x0); - dwc_ddrphy_apb_wr(0x5410a,0x0); - dwc_ddrphy_apb_wr(0x5410b,0x0); - dwc_ddrphy_apb_wr(0x5410c,0x0); - dwc_ddrphy_apb_wr(0x5410d,0x0); - dwc_ddrphy_apb_wr(0x5410e,0x0); - dwc_ddrphy_apb_wr(0x5410f,0x0); - dwc_ddrphy_apb_wr(0x54110,0x0); - dwc_ddrphy_apb_wr(0x54111,0x0); - dwc_ddrphy_apb_wr(0x54112,0x0); - dwc_ddrphy_apb_wr(0x54113,0x0); - dwc_ddrphy_apb_wr(0x54114,0x0); - dwc_ddrphy_apb_wr(0x54115,0x0); - dwc_ddrphy_apb_wr(0x54116,0x0); - dwc_ddrphy_apb_wr(0x54117,0x0); - dwc_ddrphy_apb_wr(0x54118,0x0); - dwc_ddrphy_apb_wr(0x54119,0x0); - dwc_ddrphy_apb_wr(0x5411a,0x0); - dwc_ddrphy_apb_wr(0x5411b,0x0); - dwc_ddrphy_apb_wr(0x5411c,0x0); - dwc_ddrphy_apb_wr(0x5411d,0x0); - dwc_ddrphy_apb_wr(0x5411e,0x0); - dwc_ddrphy_apb_wr(0x5411f,0x0); - dwc_ddrphy_apb_wr(0x54120,0x0); - dwc_ddrphy_apb_wr(0x54121,0x0); - dwc_ddrphy_apb_wr(0x54122,0x0); - dwc_ddrphy_apb_wr(0x54123,0x0); - dwc_ddrphy_apb_wr(0x54124,0x0); - dwc_ddrphy_apb_wr(0x54125,0x0); - dwc_ddrphy_apb_wr(0x54126,0x0); - dwc_ddrphy_apb_wr(0x54127,0x0); - dwc_ddrphy_apb_wr(0x54128,0x0); - dwc_ddrphy_apb_wr(0x54129,0x0); - dwc_ddrphy_apb_wr(0x5412a,0x0); - dwc_ddrphy_apb_wr(0x5412b,0x0); - dwc_ddrphy_apb_wr(0x5412c,0x0); - dwc_ddrphy_apb_wr(0x5412d,0x0); - dwc_ddrphy_apb_wr(0x5412e,0x0); - dwc_ddrphy_apb_wr(0x5412f,0x0); - dwc_ddrphy_apb_wr(0x54130,0x0); - dwc_ddrphy_apb_wr(0x54131,0x0); - dwc_ddrphy_apb_wr(0x54132,0x0); - dwc_ddrphy_apb_wr(0x54133,0x0); - dwc_ddrphy_apb_wr(0x54134,0x0); - dwc_ddrphy_apb_wr(0x54135,0x0); - dwc_ddrphy_apb_wr(0x54136,0x0); - dwc_ddrphy_apb_wr(0x54137,0x0); - dwc_ddrphy_apb_wr(0x54138,0x0); - dwc_ddrphy_apb_wr(0x54139,0x0); - dwc_ddrphy_apb_wr(0x5413a,0x0); - dwc_ddrphy_apb_wr(0x5413b,0x0); - dwc_ddrphy_apb_wr(0x5413c,0x0); - dwc_ddrphy_apb_wr(0x5413d,0x0); - dwc_ddrphy_apb_wr(0x5413e,0x0); - dwc_ddrphy_apb_wr(0x5413f,0x0); - dwc_ddrphy_apb_wr(0x54140,0x0); - dwc_ddrphy_apb_wr(0x54141,0x0); - dwc_ddrphy_apb_wr(0x54142,0x0); - dwc_ddrphy_apb_wr(0x54143,0x0); - dwc_ddrphy_apb_wr(0x54144,0x0); - dwc_ddrphy_apb_wr(0x54145,0x0); - dwc_ddrphy_apb_wr(0x54146,0x0); - dwc_ddrphy_apb_wr(0x54147,0x0); - dwc_ddrphy_apb_wr(0x54148,0x0); - dwc_ddrphy_apb_wr(0x54149,0x0); - dwc_ddrphy_apb_wr(0x5414a,0x0); - dwc_ddrphy_apb_wr(0x5414b,0x0); - dwc_ddrphy_apb_wr(0x5414c,0x0); - dwc_ddrphy_apb_wr(0x5414d,0x0); - dwc_ddrphy_apb_wr(0x5414e,0x0); - dwc_ddrphy_apb_wr(0x5414f,0x0); - dwc_ddrphy_apb_wr(0x54150,0x0); - dwc_ddrphy_apb_wr(0x54151,0x0); - dwc_ddrphy_apb_wr(0x54152,0x0); - dwc_ddrphy_apb_wr(0x54153,0x0); - dwc_ddrphy_apb_wr(0x54154,0x0); - dwc_ddrphy_apb_wr(0x54155,0x0); - dwc_ddrphy_apb_wr(0x54156,0x0); - dwc_ddrphy_apb_wr(0x54157,0x0); - dwc_ddrphy_apb_wr(0x54158,0x0); - dwc_ddrphy_apb_wr(0x54159,0x0); - dwc_ddrphy_apb_wr(0x5415a,0x0); - dwc_ddrphy_apb_wr(0x5415b,0x0); - dwc_ddrphy_apb_wr(0x5415c,0x0); - dwc_ddrphy_apb_wr(0x5415d,0x0); - dwc_ddrphy_apb_wr(0x5415e,0x0); - dwc_ddrphy_apb_wr(0x5415f,0x0); - dwc_ddrphy_apb_wr(0x54160,0x0); - dwc_ddrphy_apb_wr(0x54161,0x0); - dwc_ddrphy_apb_wr(0x54162,0x0); - dwc_ddrphy_apb_wr(0x54163,0x0); - dwc_ddrphy_apb_wr(0x54164,0x0); - dwc_ddrphy_apb_wr(0x54165,0x0); - dwc_ddrphy_apb_wr(0x54166,0x0); - dwc_ddrphy_apb_wr(0x54167,0x0); - dwc_ddrphy_apb_wr(0x54168,0x0); - dwc_ddrphy_apb_wr(0x54169,0x0); - dwc_ddrphy_apb_wr(0x5416a,0x0); - dwc_ddrphy_apb_wr(0x5416b,0x0); - dwc_ddrphy_apb_wr(0x5416c,0x0); - dwc_ddrphy_apb_wr(0x5416d,0x0); - dwc_ddrphy_apb_wr(0x5416e,0x0); - dwc_ddrphy_apb_wr(0x5416f,0x0); - dwc_ddrphy_apb_wr(0x54170,0x0); - dwc_ddrphy_apb_wr(0x54171,0x0); - dwc_ddrphy_apb_wr(0x54172,0x0); - dwc_ddrphy_apb_wr(0x54173,0x0); - dwc_ddrphy_apb_wr(0x54174,0x0); - dwc_ddrphy_apb_wr(0x54175,0x0); - dwc_ddrphy_apb_wr(0x54176,0x0); - dwc_ddrphy_apb_wr(0x54177,0x0); - dwc_ddrphy_apb_wr(0x54178,0x0); - dwc_ddrphy_apb_wr(0x54179,0x0); - dwc_ddrphy_apb_wr(0x5417a,0x0); - dwc_ddrphy_apb_wr(0x5417b,0x0); - dwc_ddrphy_apb_wr(0x5417c,0x0); - dwc_ddrphy_apb_wr(0x5417d,0x0); - dwc_ddrphy_apb_wr(0x5417e,0x0); - dwc_ddrphy_apb_wr(0x5417f,0x0); - dwc_ddrphy_apb_wr(0x54180,0x0); - dwc_ddrphy_apb_wr(0x54181,0x0); - dwc_ddrphy_apb_wr(0x54182,0x0); - dwc_ddrphy_apb_wr(0x54183,0x0); - dwc_ddrphy_apb_wr(0x54184,0x0); - dwc_ddrphy_apb_wr(0x54185,0x0); - dwc_ddrphy_apb_wr(0x54186,0x0); - dwc_ddrphy_apb_wr(0x54187,0x0); - dwc_ddrphy_apb_wr(0x54188,0x0); - dwc_ddrphy_apb_wr(0x54189,0x0); - dwc_ddrphy_apb_wr(0x5418a,0x0); - dwc_ddrphy_apb_wr(0x5418b,0x0); - dwc_ddrphy_apb_wr(0x5418c,0x0); - dwc_ddrphy_apb_wr(0x5418d,0x0); - dwc_ddrphy_apb_wr(0x5418e,0x0); - dwc_ddrphy_apb_wr(0x5418f,0x0); - dwc_ddrphy_apb_wr(0x54190,0x0); - dwc_ddrphy_apb_wr(0x54191,0x0); - dwc_ddrphy_apb_wr(0x54192,0x0); - dwc_ddrphy_apb_wr(0x54193,0x0); - dwc_ddrphy_apb_wr(0x54194,0x0); - dwc_ddrphy_apb_wr(0x54195,0x0); - dwc_ddrphy_apb_wr(0x54196,0x0); - dwc_ddrphy_apb_wr(0x54197,0x0); - dwc_ddrphy_apb_wr(0x54198,0x0); - dwc_ddrphy_apb_wr(0x54199,0x0); - dwc_ddrphy_apb_wr(0x5419a,0x0); - dwc_ddrphy_apb_wr(0x5419b,0x0); - dwc_ddrphy_apb_wr(0x5419c,0x0); - dwc_ddrphy_apb_wr(0x5419d,0x0); - dwc_ddrphy_apb_wr(0x5419e,0x0); - dwc_ddrphy_apb_wr(0x5419f,0x0); - dwc_ddrphy_apb_wr(0x541a0,0x0); - dwc_ddrphy_apb_wr(0x541a1,0x0); - dwc_ddrphy_apb_wr(0x541a2,0x0); - dwc_ddrphy_apb_wr(0x541a3,0x0); - dwc_ddrphy_apb_wr(0x541a4,0x0); - dwc_ddrphy_apb_wr(0x541a5,0x0); - dwc_ddrphy_apb_wr(0x541a6,0x0); - dwc_ddrphy_apb_wr(0x541a7,0x0); - dwc_ddrphy_apb_wr(0x541a8,0x0); - dwc_ddrphy_apb_wr(0x541a9,0x0); - dwc_ddrphy_apb_wr(0x541aa,0x0); - dwc_ddrphy_apb_wr(0x541ab,0x0); - dwc_ddrphy_apb_wr(0x541ac,0x0); - dwc_ddrphy_apb_wr(0x541ad,0x0); - dwc_ddrphy_apb_wr(0x541ae,0x0); - dwc_ddrphy_apb_wr(0x541af,0x0); - dwc_ddrphy_apb_wr(0x541b0,0x0); - dwc_ddrphy_apb_wr(0x541b1,0x0); - dwc_ddrphy_apb_wr(0x541b2,0x0); - dwc_ddrphy_apb_wr(0x541b3,0x0); - dwc_ddrphy_apb_wr(0x541b4,0x0); - dwc_ddrphy_apb_wr(0x541b5,0x0); - dwc_ddrphy_apb_wr(0x541b6,0x0); - dwc_ddrphy_apb_wr(0x541b7,0x0); - dwc_ddrphy_apb_wr(0x541b8,0x0); - dwc_ddrphy_apb_wr(0x541b9,0x0); - dwc_ddrphy_apb_wr(0x541ba,0x0); - dwc_ddrphy_apb_wr(0x541bb,0x0); - dwc_ddrphy_apb_wr(0x541bc,0x0); - dwc_ddrphy_apb_wr(0x541bd,0x0); - dwc_ddrphy_apb_wr(0x541be,0x0); - dwc_ddrphy_apb_wr(0x541bf,0x0); - dwc_ddrphy_apb_wr(0x541c0,0x0); - dwc_ddrphy_apb_wr(0x541c1,0x0); - dwc_ddrphy_apb_wr(0x541c2,0x0); - dwc_ddrphy_apb_wr(0x541c3,0x0); - dwc_ddrphy_apb_wr(0x541c4,0x0); - dwc_ddrphy_apb_wr(0x541c5,0x0); - dwc_ddrphy_apb_wr(0x541c6,0x0); - dwc_ddrphy_apb_wr(0x541c7,0x0); - dwc_ddrphy_apb_wr(0x541c8,0x0); - dwc_ddrphy_apb_wr(0x541c9,0x0); - dwc_ddrphy_apb_wr(0x541ca,0x0); - dwc_ddrphy_apb_wr(0x541cb,0x0); - dwc_ddrphy_apb_wr(0x541cc,0x0); - dwc_ddrphy_apb_wr(0x541cd,0x0); - dwc_ddrphy_apb_wr(0x541ce,0x0); - dwc_ddrphy_apb_wr(0x541cf,0x0); - dwc_ddrphy_apb_wr(0x541d0,0x0); - dwc_ddrphy_apb_wr(0x541d1,0x0); - dwc_ddrphy_apb_wr(0x541d2,0x0); - dwc_ddrphy_apb_wr(0x541d3,0x0); - dwc_ddrphy_apb_wr(0x541d4,0x0); - dwc_ddrphy_apb_wr(0x541d5,0x0); - dwc_ddrphy_apb_wr(0x541d6,0x0); - dwc_ddrphy_apb_wr(0x541d7,0x0); - dwc_ddrphy_apb_wr(0x541d8,0x0); - dwc_ddrphy_apb_wr(0x541d9,0x0); - dwc_ddrphy_apb_wr(0x541da,0x0); - dwc_ddrphy_apb_wr(0x541db,0x0); - dwc_ddrphy_apb_wr(0x541dc,0x0); - dwc_ddrphy_apb_wr(0x541dd,0x0); - dwc_ddrphy_apb_wr(0x541de,0x0); - dwc_ddrphy_apb_wr(0x541df,0x0); - dwc_ddrphy_apb_wr(0x541e0,0x0); - dwc_ddrphy_apb_wr(0x541e1,0x0); - dwc_ddrphy_apb_wr(0x541e2,0x0); - dwc_ddrphy_apb_wr(0x541e3,0x0); - dwc_ddrphy_apb_wr(0x541e4,0x0); - dwc_ddrphy_apb_wr(0x541e5,0x0); - dwc_ddrphy_apb_wr(0x541e6,0x0); - dwc_ddrphy_apb_wr(0x541e7,0x0); - dwc_ddrphy_apb_wr(0x541e8,0x0); - dwc_ddrphy_apb_wr(0x541e9,0x0); - dwc_ddrphy_apb_wr(0x541ea,0x0); - dwc_ddrphy_apb_wr(0x541eb,0x0); - dwc_ddrphy_apb_wr(0x541ec,0x0); - dwc_ddrphy_apb_wr(0x541ed,0x0); - dwc_ddrphy_apb_wr(0x541ee,0x0); - dwc_ddrphy_apb_wr(0x541ef,0x0); - dwc_ddrphy_apb_wr(0x541f0,0x0); - dwc_ddrphy_apb_wr(0x541f1,0x0); - dwc_ddrphy_apb_wr(0x541f2,0x0); - dwc_ddrphy_apb_wr(0x541f3,0x0); - dwc_ddrphy_apb_wr(0x541f4,0x0); - dwc_ddrphy_apb_wr(0x541f5,0x0); - dwc_ddrphy_apb_wr(0x541f6,0x0); - dwc_ddrphy_apb_wr(0x541f7,0x0); - dwc_ddrphy_apb_wr(0x541f8,0x0); - dwc_ddrphy_apb_wr(0x541f9,0x0); - dwc_ddrphy_apb_wr(0x541fa,0x0); - dwc_ddrphy_apb_wr(0x541fb,0x0); - dwc_ddrphy_apb_wr(0x541fc,0x100); - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0099,0x9); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - dwc_ddrphy_apb_wr(0xd0099,0x1); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - dwc_ddrphy_apb_wr(0xd0099,0x0); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - - wait_ddrphy_training_complete(); - - dwc_ddrphy_apb_wr(0xd0099,0x1); /* DWC_DDRPHYA_APBONLY0_MicroReset */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0xd0000,0x0); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ - dwc_ddrphy_apb_wr(0x90000,0x10); /* DWC_DDRPHYA_INITENG0_PreSequenceReg0b0s0 */ - dwc_ddrphy_apb_wr(0x90001,0x400); /* DWC_DDRPHYA_INITENG0_PreSequenceReg0b0s1 */ - dwc_ddrphy_apb_wr(0x90002,0x10e); /* DWC_DDRPHYA_INITENG0_PreSequenceReg0b0s2 */ - dwc_ddrphy_apb_wr(0x90003,0x0); /* DWC_DDRPHYA_INITENG0_PreSequenceReg0b1s0 */ - dwc_ddrphy_apb_wr(0x90004,0x0); /* DWC_DDRPHYA_INITENG0_PreSequenceReg0b1s1 */ - dwc_ddrphy_apb_wr(0x90005,0x8); /* DWC_DDRPHYA_INITENG0_PreSequenceReg0b1s2 */ - dwc_ddrphy_apb_wr(0x90029,0xb); /* DWC_DDRPHYA_INITENG0_SequenceReg0b0s0 */ - dwc_ddrphy_apb_wr(0x9002a,0x480); /* DWC_DDRPHYA_INITENG0_SequenceReg0b0s1 */ - dwc_ddrphy_apb_wr(0x9002b,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b0s2 */ - dwc_ddrphy_apb_wr(0x9002c,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b1s0 */ - dwc_ddrphy_apb_wr(0x9002d,0x448); /* DWC_DDRPHYA_INITENG0_SequenceReg0b1s1 */ - dwc_ddrphy_apb_wr(0x9002e,0x139); /* DWC_DDRPHYA_INITENG0_SequenceReg0b1s2 */ - dwc_ddrphy_apb_wr(0x9002f,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b2s0 */ - dwc_ddrphy_apb_wr(0x90030,0x478); /* DWC_DDRPHYA_INITENG0_SequenceReg0b2s1 */ - dwc_ddrphy_apb_wr(0x90031,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b2s2 */ - dwc_ddrphy_apb_wr(0x90032,0x2); /* DWC_DDRPHYA_INITENG0_SequenceReg0b3s0 */ - dwc_ddrphy_apb_wr(0x90033,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b3s1 */ - dwc_ddrphy_apb_wr(0x90034,0x139); /* DWC_DDRPHYA_INITENG0_SequenceReg0b3s2 */ - dwc_ddrphy_apb_wr(0x90035,0xf); /* DWC_DDRPHYA_INITENG0_SequenceReg0b4s0 */ - dwc_ddrphy_apb_wr(0x90036,0x7c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b4s1 */ - dwc_ddrphy_apb_wr(0x90037,0x139); /* DWC_DDRPHYA_INITENG0_SequenceReg0b4s2 */ - dwc_ddrphy_apb_wr(0x90038,0x44); /* DWC_DDRPHYA_INITENG0_SequenceReg0b5s0 */ - dwc_ddrphy_apb_wr(0x90039,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b5s1 */ - dwc_ddrphy_apb_wr(0x9003a,0x159); /* DWC_DDRPHYA_INITENG0_SequenceReg0b5s2 */ - dwc_ddrphy_apb_wr(0x9003b,0x14f); /* DWC_DDRPHYA_INITENG0_SequenceReg0b6s0 */ - dwc_ddrphy_apb_wr(0x9003c,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b6s1 */ - dwc_ddrphy_apb_wr(0x9003d,0x159); /* DWC_DDRPHYA_INITENG0_SequenceReg0b6s2 */ - dwc_ddrphy_apb_wr(0x9003e,0x47); /* DWC_DDRPHYA_INITENG0_SequenceReg0b7s0 */ - dwc_ddrphy_apb_wr(0x9003f,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b7s1 */ - dwc_ddrphy_apb_wr(0x90040,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b7s2 */ - dwc_ddrphy_apb_wr(0x90041,0x4f); /* DWC_DDRPHYA_INITENG0_SequenceReg0b8s0 */ - dwc_ddrphy_apb_wr(0x90042,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b8s1 */ - dwc_ddrphy_apb_wr(0x90043,0x179); /* DWC_DDRPHYA_INITENG0_SequenceReg0b8s2 */ - dwc_ddrphy_apb_wr(0x90044,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b9s0 */ - dwc_ddrphy_apb_wr(0x90045,0xe0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b9s1 */ - dwc_ddrphy_apb_wr(0x90046,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b9s2 */ - dwc_ddrphy_apb_wr(0x90047,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b10s0 */ - dwc_ddrphy_apb_wr(0x90048,0x7c8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b10s1 */ - dwc_ddrphy_apb_wr(0x90049,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b10s2 */ - dwc_ddrphy_apb_wr(0x9004a,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b11s0 */ - dwc_ddrphy_apb_wr(0x9004b,0x1); /* DWC_DDRPHYA_INITENG0_SequenceReg0b11s1 */ - dwc_ddrphy_apb_wr(0x9004c,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b11s2 */ - dwc_ddrphy_apb_wr(0x9004d,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b12s0 */ - dwc_ddrphy_apb_wr(0x9004e,0x45a); /* DWC_DDRPHYA_INITENG0_SequenceReg0b12s1 */ - dwc_ddrphy_apb_wr(0x9004f,0x9); /* DWC_DDRPHYA_INITENG0_SequenceReg0b12s2 */ - dwc_ddrphy_apb_wr(0x90050,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b13s0 */ - dwc_ddrphy_apb_wr(0x90051,0x448); /* DWC_DDRPHYA_INITENG0_SequenceReg0b13s1 */ - dwc_ddrphy_apb_wr(0x90052,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b13s2 */ - dwc_ddrphy_apb_wr(0x90053,0x40); /* DWC_DDRPHYA_INITENG0_SequenceReg0b14s0 */ - dwc_ddrphy_apb_wr(0x90054,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b14s1 */ - dwc_ddrphy_apb_wr(0x90055,0x179); /* DWC_DDRPHYA_INITENG0_SequenceReg0b14s2 */ - dwc_ddrphy_apb_wr(0x90056,0x1); /* DWC_DDRPHYA_INITENG0_SequenceReg0b15s0 */ - dwc_ddrphy_apb_wr(0x90057,0x618); /* DWC_DDRPHYA_INITENG0_SequenceReg0b15s1 */ - dwc_ddrphy_apb_wr(0x90058,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b15s2 */ - dwc_ddrphy_apb_wr(0x90059,0x40c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b16s0 */ - dwc_ddrphy_apb_wr(0x9005a,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b16s1 */ - dwc_ddrphy_apb_wr(0x9005b,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b16s2 */ - dwc_ddrphy_apb_wr(0x9005c,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b17s0 */ - dwc_ddrphy_apb_wr(0x9005d,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b17s1 */ - dwc_ddrphy_apb_wr(0x9005e,0x48); /* DWC_DDRPHYA_INITENG0_SequenceReg0b17s2 */ - dwc_ddrphy_apb_wr(0x9005f,0x4040); /* DWC_DDRPHYA_INITENG0_SequenceReg0b18s0 */ - dwc_ddrphy_apb_wr(0x90060,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b18s1 */ - dwc_ddrphy_apb_wr(0x90061,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b18s2 */ - dwc_ddrphy_apb_wr(0x90062,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b19s0 */ - dwc_ddrphy_apb_wr(0x90063,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b19s1 */ - dwc_ddrphy_apb_wr(0x90064,0x48); /* DWC_DDRPHYA_INITENG0_SequenceReg0b19s2 */ - dwc_ddrphy_apb_wr(0x90065,0x40); /* DWC_DDRPHYA_INITENG0_SequenceReg0b20s0 */ - dwc_ddrphy_apb_wr(0x90066,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b20s1 */ - dwc_ddrphy_apb_wr(0x90067,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b20s2 */ - dwc_ddrphy_apb_wr(0x90068,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b21s0 */ - dwc_ddrphy_apb_wr(0x90069,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b21s1 */ - dwc_ddrphy_apb_wr(0x9006a,0x18); /* DWC_DDRPHYA_INITENG0_SequenceReg0b21s2 */ - dwc_ddrphy_apb_wr(0x9006b,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b22s0 */ - dwc_ddrphy_apb_wr(0x9006c,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b22s1 */ - dwc_ddrphy_apb_wr(0x9006d,0x78); /* DWC_DDRPHYA_INITENG0_SequenceReg0b22s2 */ - dwc_ddrphy_apb_wr(0x9006e,0x549); /* DWC_DDRPHYA_INITENG0_SequenceReg0b23s0 */ - dwc_ddrphy_apb_wr(0x9006f,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b23s1 */ - dwc_ddrphy_apb_wr(0x90070,0x159); /* DWC_DDRPHYA_INITENG0_SequenceReg0b23s2 */ - dwc_ddrphy_apb_wr(0x90071,0xd49); /* DWC_DDRPHYA_INITENG0_SequenceReg0b24s0 */ - dwc_ddrphy_apb_wr(0x90072,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b24s1 */ - dwc_ddrphy_apb_wr(0x90073,0x159); /* DWC_DDRPHYA_INITENG0_SequenceReg0b24s2 */ - dwc_ddrphy_apb_wr(0x90074,0x94a); /* DWC_DDRPHYA_INITENG0_SequenceReg0b25s0 */ - dwc_ddrphy_apb_wr(0x90075,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b25s1 */ - dwc_ddrphy_apb_wr(0x90076,0x159); /* DWC_DDRPHYA_INITENG0_SequenceReg0b25s2 */ - dwc_ddrphy_apb_wr(0x90077,0x441); /* DWC_DDRPHYA_INITENG0_SequenceReg0b26s0 */ - dwc_ddrphy_apb_wr(0x90078,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b26s1 */ - dwc_ddrphy_apb_wr(0x90079,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b26s2 */ - dwc_ddrphy_apb_wr(0x9007a,0x42); /* DWC_DDRPHYA_INITENG0_SequenceReg0b27s0 */ - dwc_ddrphy_apb_wr(0x9007b,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b27s1 */ - dwc_ddrphy_apb_wr(0x9007c,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b27s2 */ - dwc_ddrphy_apb_wr(0x9007d,0x1); /* DWC_DDRPHYA_INITENG0_SequenceReg0b28s0 */ - dwc_ddrphy_apb_wr(0x9007e,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b28s1 */ - dwc_ddrphy_apb_wr(0x9007f,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b28s2 */ - dwc_ddrphy_apb_wr(0x90080,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b29s0 */ - dwc_ddrphy_apb_wr(0x90081,0xe0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b29s1 */ - dwc_ddrphy_apb_wr(0x90082,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b29s2 */ - dwc_ddrphy_apb_wr(0x90083,0xa); /* DWC_DDRPHYA_INITENG0_SequenceReg0b30s0 */ - dwc_ddrphy_apb_wr(0x90084,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b30s1 */ - dwc_ddrphy_apb_wr(0x90085,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b30s2 */ - dwc_ddrphy_apb_wr(0x90086,0x9); /* DWC_DDRPHYA_INITENG0_SequenceReg0b31s0 */ - dwc_ddrphy_apb_wr(0x90087,0x3c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b31s1 */ - dwc_ddrphy_apb_wr(0x90088,0x149); /* DWC_DDRPHYA_INITENG0_SequenceReg0b31s2 */ - dwc_ddrphy_apb_wr(0x90089,0x9); /* DWC_DDRPHYA_INITENG0_SequenceReg0b32s0 */ - dwc_ddrphy_apb_wr(0x9008a,0x3c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b32s1 */ - dwc_ddrphy_apb_wr(0x9008b,0x159); /* DWC_DDRPHYA_INITENG0_SequenceReg0b32s2 */ - dwc_ddrphy_apb_wr(0x9008c,0x18); /* DWC_DDRPHYA_INITENG0_SequenceReg0b33s0 */ - dwc_ddrphy_apb_wr(0x9008d,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b33s1 */ - dwc_ddrphy_apb_wr(0x9008e,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b33s2 */ - dwc_ddrphy_apb_wr(0x9008f,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b34s0 */ - dwc_ddrphy_apb_wr(0x90090,0x3c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b34s1 */ - dwc_ddrphy_apb_wr(0x90091,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b34s2 */ - dwc_ddrphy_apb_wr(0x90092,0x18); /* DWC_DDRPHYA_INITENG0_SequenceReg0b35s0 */ - dwc_ddrphy_apb_wr(0x90093,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b35s1 */ - dwc_ddrphy_apb_wr(0x90094,0x48); /* DWC_DDRPHYA_INITENG0_SequenceReg0b35s2 */ - dwc_ddrphy_apb_wr(0x90095,0x18); /* DWC_DDRPHYA_INITENG0_SequenceReg0b36s0 */ - dwc_ddrphy_apb_wr(0x90096,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b36s1 */ - dwc_ddrphy_apb_wr(0x90097,0x58); /* DWC_DDRPHYA_INITENG0_SequenceReg0b36s2 */ - dwc_ddrphy_apb_wr(0x90098,0xa); /* DWC_DDRPHYA_INITENG0_SequenceReg0b37s0 */ - dwc_ddrphy_apb_wr(0x90099,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b37s1 */ - dwc_ddrphy_apb_wr(0x9009a,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b37s2 */ - dwc_ddrphy_apb_wr(0x9009b,0x2); /* DWC_DDRPHYA_INITENG0_SequenceReg0b38s0 */ - dwc_ddrphy_apb_wr(0x9009c,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b38s1 */ - dwc_ddrphy_apb_wr(0x9009d,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b38s2 */ - dwc_ddrphy_apb_wr(0x9009e,0x7); /* DWC_DDRPHYA_INITENG0_SequenceReg0b39s0 */ - dwc_ddrphy_apb_wr(0x9009f,0x7c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b39s1 */ - dwc_ddrphy_apb_wr(0x900a0,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b39s2 */ - dwc_ddrphy_apb_wr(0x900a1,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b40s0 */ - dwc_ddrphy_apb_wr(0x900a2,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b40s1 */ - dwc_ddrphy_apb_wr(0x900a3,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b40s2 */ - dwc_ddrphy_apb_wr(0x900a4,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b41s0 */ - dwc_ddrphy_apb_wr(0x900a5,0x8140); /* DWC_DDRPHYA_INITENG0_SequenceReg0b41s1 */ - dwc_ddrphy_apb_wr(0x900a6,0x10c); /* DWC_DDRPHYA_INITENG0_SequenceReg0b41s2 */ - dwc_ddrphy_apb_wr(0x900a7,0x10); /* DWC_DDRPHYA_INITENG0_SequenceReg0b42s0 */ - dwc_ddrphy_apb_wr(0x900a8,0x8138); /* DWC_DDRPHYA_INITENG0_SequenceReg0b42s1 */ - dwc_ddrphy_apb_wr(0x900a9,0x10c); /* DWC_DDRPHYA_INITENG0_SequenceReg0b42s2 */ - dwc_ddrphy_apb_wr(0x900aa,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b43s0 */ - dwc_ddrphy_apb_wr(0x900ab,0x7c8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b43s1 */ - dwc_ddrphy_apb_wr(0x900ac,0x101); /* DWC_DDRPHYA_INITENG0_SequenceReg0b43s2 */ - dwc_ddrphy_apb_wr(0x900ad,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b44s0 */ - dwc_ddrphy_apb_wr(0x900ae,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b44s1 */ - dwc_ddrphy_apb_wr(0x900af,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b44s2 */ - dwc_ddrphy_apb_wr(0x900b0,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b45s0 */ - dwc_ddrphy_apb_wr(0x900b1,0x448); /* DWC_DDRPHYA_INITENG0_SequenceReg0b45s1 */ - dwc_ddrphy_apb_wr(0x900b2,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b45s2 */ - dwc_ddrphy_apb_wr(0x900b3,0xf); /* DWC_DDRPHYA_INITENG0_SequenceReg0b46s0 */ - dwc_ddrphy_apb_wr(0x900b4,0x7c0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b46s1 */ - dwc_ddrphy_apb_wr(0x900b5,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b46s2 */ - dwc_ddrphy_apb_wr(0x900b6,0x47); /* DWC_DDRPHYA_INITENG0_SequenceReg0b47s0 */ - dwc_ddrphy_apb_wr(0x900b7,0x630); /* DWC_DDRPHYA_INITENG0_SequenceReg0b47s1 */ - dwc_ddrphy_apb_wr(0x900b8,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b47s2 */ - dwc_ddrphy_apb_wr(0x900b9,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b48s0 */ - dwc_ddrphy_apb_wr(0x900ba,0x618); /* DWC_DDRPHYA_INITENG0_SequenceReg0b48s1 */ - dwc_ddrphy_apb_wr(0x900bb,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b48s2 */ - dwc_ddrphy_apb_wr(0x900bc,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b49s0 */ - dwc_ddrphy_apb_wr(0x900bd,0xe0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b49s1 */ - dwc_ddrphy_apb_wr(0x900be,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b49s2 */ - dwc_ddrphy_apb_wr(0x900bf,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b50s0 */ - dwc_ddrphy_apb_wr(0x900c0,0x7c8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b50s1 */ - dwc_ddrphy_apb_wr(0x900c1,0x109); /* DWC_DDRPHYA_INITENG0_SequenceReg0b50s2 */ - dwc_ddrphy_apb_wr(0x900c2,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b51s0 */ - dwc_ddrphy_apb_wr(0x900c3,0x8140); /* DWC_DDRPHYA_INITENG0_SequenceReg0b51s1 */ - dwc_ddrphy_apb_wr(0x900c4,0x10c); /* DWC_DDRPHYA_INITENG0_SequenceReg0b51s2 */ - dwc_ddrphy_apb_wr(0x900c5,0x0); /* DWC_DDRPHYA_INITENG0_SequenceReg0b52s0 */ - dwc_ddrphy_apb_wr(0x900c6,0x1); /* DWC_DDRPHYA_INITENG0_SequenceReg0b52s1 */ - dwc_ddrphy_apb_wr(0x900c7,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b52s2 */ - dwc_ddrphy_apb_wr(0x900c8,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b53s0 */ - dwc_ddrphy_apb_wr(0x900c9,0x4); /* DWC_DDRPHYA_INITENG0_SequenceReg0b53s1 */ - dwc_ddrphy_apb_wr(0x900ca,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b53s2 */ - dwc_ddrphy_apb_wr(0x900cb,0x8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b54s0 */ - dwc_ddrphy_apb_wr(0x900cc,0x7c8); /* DWC_DDRPHYA_INITENG0_SequenceReg0b54s1 */ - dwc_ddrphy_apb_wr(0x900cd,0x101); /* DWC_DDRPHYA_INITENG0_SequenceReg0b54s2 */ - dwc_ddrphy_apb_wr(0x90006,0x0); /* DWC_DDRPHYA_INITENG0_PostSequenceReg0b0s0 */ - dwc_ddrphy_apb_wr(0x90007,0x0); /* DWC_DDRPHYA_INITENG0_PostSequenceReg0b0s1 */ - dwc_ddrphy_apb_wr(0x90008,0x8); /* DWC_DDRPHYA_INITENG0_PostSequenceReg0b0s2 */ - dwc_ddrphy_apb_wr(0x90009,0x0); /* DWC_DDRPHYA_INITENG0_PostSequenceReg0b1s0 */ - dwc_ddrphy_apb_wr(0x9000a,0x0); /* DWC_DDRPHYA_INITENG0_PostSequenceReg0b1s1 */ - dwc_ddrphy_apb_wr(0x9000b,0x0); /* DWC_DDRPHYA_INITENG0_PostSequenceReg0b1s2 */ - dwc_ddrphy_apb_wr(0xd00e7,0x400); /* DWC_DDRPHYA_APBONLY0_SequencerOverride */ - dwc_ddrphy_apb_wr(0x90017,0x0); /* DWC_DDRPHYA_INITENG0_StartVector0b0 */ - dwc_ddrphy_apb_wr(0x90026,0x2c); /* DWC_DDRPHYA_INITENG0_StartVector0b15 */ - dwc_ddrphy_apb_wr(0x9000c,0x0); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag0 */ - dwc_ddrphy_apb_wr(0x9000d,0x173); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag1 */ - dwc_ddrphy_apb_wr(0x9000e,0x60); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag2 */ - dwc_ddrphy_apb_wr(0x9000f,0x6110); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag3 */ - dwc_ddrphy_apb_wr(0x90010,0x2152); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag4 */ - dwc_ddrphy_apb_wr(0x90011,0xdfbd); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag5 */ - dwc_ddrphy_apb_wr(0x90012,0xffff); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag6 */ - dwc_ddrphy_apb_wr(0x90013,0x6152); /* DWC_DDRPHYA_INITENG0_Seq0BDisableFlag7 */ - dwc_ddrphy_apb_wr(0xc0080,0x0); /* DWC_DDRPHYA_DRTUB0_UcclkHclkEnables */ - dwc_ddrphy_apb_wr(0xd0000,0x1); /* DWC_DDRPHYA_APBONLY0_MicroContMuxSel */ -} diff --git a/board/freescale/imx8mq_val/ddr4_timing.c b/board/freescale/imx8mq_val/ddr4_timing.c new file mode 100644 index 0000000000..5c8c3dcfe1 --- /dev/null +++ b/board/freescale/imx8mq_val/ddr4_timing.c @@ -0,0 +1,1409 @@ +/* + * Copyright 2020 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Generated code from MX8M_DDR_tool + * + * Align with uboot version: + * imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga + * For imx_v2019.04_5.4.x and above version: + * please replace #include <asm/arch/imx8m_ddr.h> with #include <asm/arch/ddr.h> + */ + +#include <linux/kernel.h> +#include <asm/arch/ddr.h> + +struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0x83040010 }, + { 0x3d400028, 0x1 }, + { 0x3d400030, 0xaa }, + { 0x3d400034, 0x221306 }, + { 0x3d400038, 0x840000 }, + { 0x3d40003c, 0x30 }, + { 0x3d400050, 0x210070 }, + { 0x3d400054, 0x10008 }, + { 0x3d400060, 0x10 }, + { 0x3d400064, 0x49009c }, + { 0x3d4000c0, 0x0 }, + { 0x3d4000c4, 0x1000 }, + { 0x3d4000d0, 0xc0030126 }, + { 0x3d4000d4, 0x770000 }, + { 0x3d4000dc, 0x8340001 }, + { 0x3d4000e0, 0x180240 }, + { 0x3d4000e4, 0x110000 }, + { 0x3d4000e8, 0x2000640 }, + { 0x3d4000ec, 0x816 }, + { 0x3d4000f0, 0x22 }, + { 0x3d4000f4, 0x527 }, + { 0x3d400100, 0x11122914 }, + { 0x3d400104, 0x4051c }, + { 0x3d400108, 0x608050d }, + { 0x3d40010c, 0x400c }, + { 0x3d400110, 0x8030409 }, + { 0x3d400114, 0x6060403 }, + { 0x3d40011c, 0x606 }, + { 0x3d400120, 0x5050d08 }, + { 0x3d400124, 0x2040a }, + { 0x3d40012c, 0x1409010e }, + { 0x3d400130, 0x8 }, + { 0x3d40013c, 0x0 }, + { 0x3d400180, 0x1000040 }, + { 0x3d400184, 0x493e }, + { 0x3d400190, 0x38b8207 }, + { 0x3d400194, 0x2020303 }, + { 0x3d400198, 0x7f04011 }, + { 0x3d40019c, 0xb0 }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0x48005a }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x1 }, + { 0x3d4001b4, 0xb07 }, + { 0x3d4001b8, 0x4 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x0 }, + { 0x3d400200, 0x3f17 }, + { 0x3d400204, 0x3f0909 }, + { 0x3d400208, 0x700 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400220, 0x3f01 }, + { 0x3d400240, 0x6000610 }, + { 0x3d400244, 0x1323 }, + { 0x3d400250, 0x317d1a07 }, + { 0x3d400254, 0xf }, + { 0x3d40025c, 0x2a001b76 }, + { 0x3d400264, 0x9 }, + { 0x3d40026c, 0x30000e06 }, + { 0x3d400300, 0x14 }, + { 0x3d400304, 0x0 }, + { 0x3d40030c, 0x0 }, + { 0x3d400320, 0x1 }, + { 0x3d40036c, 0x10 }, + { 0x3d400400, 0x11 }, + { 0x3d400404, 0x13193 }, + { 0x3d400408, 0x6096 }, + { 0x3d400490, 0x1 }, + { 0x3d400494, 0x2000c00 }, + { 0x3d400498, 0x3c00db }, + { 0x3d40049c, 0x100001 }, + { 0x3d4004a0, 0x41f }, + { 0x3d402050, 0x210070 }, + { 0x3d402064, 0x300068 }, + { 0x3d4020dc, 0x2100001 }, + { 0x3d4020e0, 0x40 }, + { 0x3d4020e8, 0x2000640 }, + { 0x3d4020ec, 0x416 }, + { 0x3d402100, 0xd0c1b0d }, + { 0x3d402104, 0x30313 }, + { 0x3d402108, 0x506040a }, + { 0x3d40210c, 0x400c }, + { 0x3d402110, 0x6030306 }, + { 0x3d402114, 0x4040302 }, + { 0x3d40211c, 0x404 }, + { 0x3d402120, 0x4040d06 }, + { 0x3d402124, 0x20308 }, + { 0x3d40212c, 0x1206010e }, + { 0x3d402130, 0x8 }, + { 0x3d40213c, 0x0 }, + { 0x3d402180, 0x1000040 }, + { 0x3d402190, 0x3868204 }, + { 0x3d402194, 0x2020303 }, + { 0x3d4021b4, 0x604 }, + { 0x3d4021b8, 0x4 }, + { 0x3d402240, 0x6000608 }, + { 0x3d403050, 0x210070 }, + { 0x3d403064, 0x200045 }, + { 0x3d4030dc, 0x1 }, + { 0x3d4030e0, 0x40 }, + { 0x3d4030e8, 0x2000640 }, + { 0x3d4030ec, 0x16 }, + { 0x3d403100, 0xb081209 }, + { 0x3d403104, 0x2020d }, + { 0x3d403108, 0x5050309 }, + { 0x3d40310c, 0x400c }, + { 0x3d403110, 0x4030205 }, + { 0x3d403114, 0x3030202 }, + { 0x3d40311c, 0x303 }, + { 0x3d403120, 0x3040d04 }, + { 0x3d403124, 0x20208 }, + { 0x3d40312c, 0x1005010e }, + { 0x3d403130, 0x8 }, + { 0x3d40313c, 0x0 }, + { 0x3d403180, 0x1000040 }, + { 0x3d403190, 0x3848204 }, + { 0x3d403194, 0x2020303 }, + { 0x3d4031b4, 0x404 }, + { 0x3d4031b8, 0x4 }, + { 0x3d403240, 0x6000600 }, + { 0x3d400060, 0x11 }, +}; + +/* PHY Initialize Configuration */ +struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x1005f, 0x2ff }, + { 0x1015f, 0x2ff }, + { 0x1105f, 0x2ff }, + { 0x1115f, 0x2ff }, + { 0x1205f, 0x2ff }, + { 0x1215f, 0x2ff }, + { 0x1305f, 0x2ff }, + { 0x1315f, 0x2ff }, + { 0x11005f, 0x2ff }, + { 0x11015f, 0x2ff }, + { 0x11105f, 0x2ff }, + { 0x11115f, 0x2ff }, + { 0x11205f, 0x2ff }, + { 0x11215f, 0x2ff }, + { 0x11305f, 0x2ff }, + { 0x11315f, 0x2ff }, + { 0x21005f, 0x2ff }, + { 0x21015f, 0x2ff }, + { 0x21105f, 0x2ff }, + { 0x21115f, 0x2ff }, + { 0x21205f, 0x2ff }, + { 0x21215f, 0x2ff }, + { 0x21305f, 0x2ff }, + { 0x21315f, 0x2ff }, + { 0x55, 0x3ff }, + { 0x1055, 0x3ff }, + { 0x2055, 0x3ff }, + { 0x3055, 0x3ff }, + { 0x4055, 0xff }, + { 0x5055, 0xff }, + { 0x6055, 0x3ff }, + { 0x7055, 0x3ff }, + { 0x8055, 0x3ff }, + { 0x9055, 0x3ff }, + { 0x200c5, 0xa }, + { 0x1200c5, 0xb }, + { 0x2200c5, 0x6 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x1 }, + { 0x22002e, 0x1 }, + { 0x20024, 0x8 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x8 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x8 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x6 }, + { 0x120056, 0xa }, + { 0x220056, 0xa }, + { 0x1004d, 0x38 }, + { 0x1014d, 0x38 }, + { 0x1104d, 0x38 }, + { 0x1114d, 0x38 }, + { 0x1204d, 0x38 }, + { 0x1214d, 0x38 }, + { 0x1304d, 0x38 }, + { 0x1314d, 0x38 }, + { 0x11004d, 0x38 }, + { 0x11014d, 0x38 }, + { 0x11104d, 0x38 }, + { 0x11114d, 0x38 }, + { 0x11204d, 0x38 }, + { 0x11214d, 0x38 }, + { 0x11304d, 0x38 }, + { 0x11314d, 0x38 }, + { 0x21004d, 0x38 }, + { 0x21014d, 0x38 }, + { 0x21104d, 0x38 }, + { 0x21114d, 0x38 }, + { 0x21204d, 0x38 }, + { 0x21214d, 0x38 }, + { 0x21304d, 0x38 }, + { 0x21314d, 0x38 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x5 }, + { 0x20075, 0x2 }, + { 0x20050, 0x0 }, + { 0x20008, 0x258 }, + { 0x120008, 0x190 }, + { 0x220008, 0x10a }, + { 0x20088, 0x9 }, + { 0x200b2, 0x78 }, + { 0x10043, 0x5b1 }, + { 0x10143, 0x5b1 }, + { 0x11043, 0x5b1 }, + { 0x11143, 0x5b1 }, + { 0x12043, 0x5b1 }, + { 0x12143, 0x5b1 }, + { 0x13043, 0x5b1 }, + { 0x13143, 0x5b1 }, + { 0x1200b2, 0x78 }, + { 0x110043, 0x5b1 }, + { 0x110143, 0x5b1 }, + { 0x111043, 0x5b1 }, + { 0x111143, 0x5b1 }, + { 0x112043, 0x5b1 }, + { 0x112143, 0x5b1 }, + { 0x113043, 0x5b1 }, + { 0x113143, 0x5b1 }, + { 0x2200b2, 0x78 }, + { 0x210043, 0x5b1 }, + { 0x210143, 0x5b1 }, + { 0x211043, 0x5b1 }, + { 0x211143, 0x5b1 }, + { 0x212043, 0x5b1 }, + { 0x212143, 0x5b1 }, + { 0x213043, 0x5b1 }, + { 0x213143, 0x5b1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x5 }, + { 0x120019, 0x5 }, + { 0x220019, 0x5 }, + { 0x200f0, 0x5555 }, + { 0x200f1, 0x5555 }, + { 0x200f2, 0x5555 }, + { 0x200f3, 0x5555 }, + { 0x200f4, 0x5555 }, + { 0x200f5, 0x5555 }, + { 0x200f6, 0x5555 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x200c7, 0x80 }, + { 0x1200c7, 0x80 }, + { 0x2200c7, 0x80 }, + { 0x200ca, 0x106 }, + { 0x1200ca, 0x106 }, + { 0x2200ca, 0x106 }, + { 0x20110, 0x2 }, + { 0x20111, 0x3 }, + { 0x20112, 0x4 }, + { 0x20113, 0x5 }, + { 0x20114, 0x0 }, + { 0x20115, 0x1 }, +}; + +/* ddr phy trained csr */ +struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, + { 0x200cb, 0x0 }, + { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, + { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, + { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, + { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, + { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, + { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, + { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, + { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, + { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, + { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, + { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, + { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, + { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, + { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, + { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, + { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, + { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, + { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, + { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, + { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, + { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, + { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, + { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, + { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, + { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, + { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, + { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, + { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, + { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, + { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, + { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, + { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, + { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, + { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, + { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, + { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, + { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, + { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, + { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, + { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, + { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, + { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, + { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, + { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, + { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, + { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, + { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, + { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, + { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, + { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, + { 0x10168, 0x0 }, + { 0x10268, 0x0 }, + { 0x10368, 0x0 }, + { 0x10468, 0x0 }, + { 0x10568, 0x0 }, + { 0x10668, 0x0 }, + { 0x10768, 0x0 }, + { 0x10868, 0x0 }, + { 0x11068, 0x0 }, + { 0x11168, 0x0 }, + { 0x11268, 0x0 }, + { 0x11368, 0x0 }, + { 0x11468, 0x0 }, + { 0x11568, 0x0 }, + { 0x11668, 0x0 }, + { 0x11768, 0x0 }, + { 0x11868, 0x0 }, + { 0x12068, 0x0 }, + { 0x12168, 0x0 }, + { 0x12268, 0x0 }, + { 0x12368, 0x0 }, + { 0x12468, 0x0 }, + { 0x12568, 0x0 }, + { 0x12668, 0x0 }, + { 0x12768, 0x0 }, + { 0x12868, 0x0 }, + { 0x13068, 0x0 }, + { 0x13168, 0x0 }, + { 0x13268, 0x0 }, + { 0x13368, 0x0 }, + { 0x13468, 0x0 }, + { 0x13568, 0x0 }, + { 0x13668, 0x0 }, + { 0x13768, 0x0 }, + { 0x13868, 0x0 }, + { 0x10069, 0x0 }, + { 0x10169, 0x0 }, + { 0x10269, 0x0 }, + { 0x10369, 0x0 }, + { 0x10469, 0x0 }, + { 0x10569, 0x0 }, + { 0x10669, 0x0 }, + { 0x10769, 0x0 }, + { 0x10869, 0x0 }, + { 0x11069, 0x0 }, + { 0x11169, 0x0 }, + { 0x11269, 0x0 }, + { 0x11369, 0x0 }, + { 0x11469, 0x0 }, + { 0x11569, 0x0 }, + { 0x11669, 0x0 }, + { 0x11769, 0x0 }, + { 0x11869, 0x0 }, + { 0x12069, 0x0 }, + { 0x12169, 0x0 }, + { 0x12269, 0x0 }, + { 0x12369, 0x0 }, + { 0x12469, 0x0 }, + { 0x12569, 0x0 }, + { 0x12669, 0x0 }, + { 0x12769, 0x0 }, + { 0x12869, 0x0 }, + { 0x13069, 0x0 }, + { 0x13169, 0x0 }, + { 0x13269, 0x0 }, + { 0x13369, 0x0 }, + { 0x13469, 0x0 }, + { 0x13569, 0x0 }, + { 0x13669, 0x0 }, + { 0x13769, 0x0 }, + { 0x13869, 0x0 }, + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, + { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, + { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, + { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, + { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, + { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, + { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, + { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, + { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, + { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, + { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, + { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, + { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, + { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, + { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, + { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, + { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, + { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, + { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, + { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, + { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, + { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, + { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, + { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, + { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, + { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, + { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, + { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, + { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, + { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, + { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, + { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, + { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, + { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, + { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, + { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, + { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, + { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, + { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, + { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, + { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, + { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, + { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, + { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, + { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, + { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, + { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, + { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, + { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, + { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, + { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, + { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, + { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, + { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, + { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, + { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, + { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, + { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, + { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, + { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, + { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, + { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, + { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, + { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, + { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, + { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, + { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, + { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, + { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, + { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, + { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, + { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, + { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, + { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, + { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, + { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, + { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, + { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, + { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, + { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, + { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, + { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, + { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, + { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, + { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, + { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, + { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, + { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, + { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, + { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, + { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, + { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, + { 0x20072, 0x0 }, + { 0x20073, 0x0 }, + { 0x20074, 0x0 }, + { 0x100aa, 0x0 }, + { 0x110aa, 0x0 }, + { 0x120aa, 0x0 }, + { 0x130aa, 0x0 }, + { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, + { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, + { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, + { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, + { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, + { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, + { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, + { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, + { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, + { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, + { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, + { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x0 }, + { 0x100a6, 0x0 }, + { 0x100a7, 0x0 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x0 }, + { 0x110a4, 0x0 }, + { 0x110a5, 0x0 }, + { 0x110a6, 0x0 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x0 }, + { 0x120a2, 0x0 }, + { 0x120a3, 0x0 }, + { 0x120a4, 0x0 }, + { 0x120a5, 0x0 }, + { 0x120a6, 0x0 }, + { 0x120a7, 0x0 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, + { 0x130a4, 0x0 }, + { 0x130a5, 0x0 }, + { 0x130a6, 0x0 }, + { 0x130a7, 0x0 }, + { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, + { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, + { 0x400fd, 0x0 }, + { 0x400c0, 0x0 }, + { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, + { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, + { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, + { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, + { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, + { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, + { 0x10062, 0x0 }, + { 0x10162, 0x0 }, + { 0x10262, 0x0 }, + { 0x10362, 0x0 }, + { 0x10462, 0x0 }, + { 0x10562, 0x0 }, + { 0x10662, 0x0 }, + { 0x10762, 0x0 }, + { 0x10862, 0x0 }, + { 0x11062, 0x0 }, + { 0x11162, 0x0 }, + { 0x11262, 0x0 }, + { 0x11362, 0x0 }, + { 0x11462, 0x0 }, + { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, + { 0x12062, 0x0 }, + { 0x12162, 0x0 }, + { 0x12262, 0x0 }, + { 0x12362, 0x0 }, + { 0x12462, 0x0 }, + { 0x12562, 0x0 }, + { 0x12662, 0x0 }, + { 0x12762, 0x0 }, + { 0x12862, 0x0 }, + { 0x13062, 0x0 }, + { 0x13162, 0x0 }, + { 0x13262, 0x0 }, + { 0x13362, 0x0 }, + { 0x13462, 0x0 }, + { 0x13562, 0x0 }, + { 0x13662, 0x0 }, + { 0x13762, 0x0 }, + { 0x13862, 0x0 }, + { 0x20077, 0x0 }, + { 0x10001, 0x0 }, + { 0x11001, 0x0 }, + { 0x12001, 0x0 }, + { 0x13001, 0x0 }, + { 0x10040, 0x0 }, + { 0x10140, 0x0 }, + { 0x10240, 0x0 }, + { 0x10340, 0x0 }, + { 0x10440, 0x0 }, + { 0x10540, 0x0 }, + { 0x10640, 0x0 }, + { 0x10740, 0x0 }, + { 0x10840, 0x0 }, + { 0x10030, 0x0 }, + { 0x10130, 0x0 }, + { 0x10230, 0x0 }, + { 0x10330, 0x0 }, + { 0x10430, 0x0 }, + { 0x10530, 0x0 }, + { 0x10630, 0x0 }, + { 0x10730, 0x0 }, + { 0x10830, 0x0 }, + { 0x11040, 0x0 }, + { 0x11140, 0x0 }, + { 0x11240, 0x0 }, + { 0x11340, 0x0 }, + { 0x11440, 0x0 }, + { 0x11540, 0x0 }, + { 0x11640, 0x0 }, + { 0x11740, 0x0 }, + { 0x11840, 0x0 }, + { 0x11030, 0x0 }, + { 0x11130, 0x0 }, + { 0x11230, 0x0 }, + { 0x11330, 0x0 }, + { 0x11430, 0x0 }, + { 0x11530, 0x0 }, + { 0x11630, 0x0 }, + { 0x11730, 0x0 }, + { 0x11830, 0x0 }, + { 0x12040, 0x0 }, + { 0x12140, 0x0 }, + { 0x12240, 0x0 }, + { 0x12340, 0x0 }, + { 0x12440, 0x0 }, + { 0x12540, 0x0 }, + { 0x12640, 0x0 }, + { 0x12740, 0x0 }, + { 0x12840, 0x0 }, + { 0x12030, 0x0 }, + { 0x12130, 0x0 }, + { 0x12230, 0x0 }, + { 0x12330, 0x0 }, + { 0x12430, 0x0 }, + { 0x12530, 0x0 }, + { 0x12630, 0x0 }, + { 0x12730, 0x0 }, + { 0x12830, 0x0 }, + { 0x13040, 0x0 }, + { 0x13140, 0x0 }, + { 0x13240, 0x0 }, + { 0x13340, 0x0 }, + { 0x13440, 0x0 }, + { 0x13540, 0x0 }, + { 0x13640, 0x0 }, + { 0x13740, 0x0 }, + { 0x13840, 0x0 }, + { 0x13030, 0x0 }, + { 0x13130, 0x0 }, + { 0x13230, 0x0 }, + { 0x13330, 0x0 }, + { 0x13430, 0x0 }, + { 0x13530, 0x0 }, + { 0x13630, 0x0 }, + { 0x13730, 0x0 }, + { 0x13830, 0x0 }, +}; +/* P0 message block paremeter for training firmware */ +struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x80 }, + { 0x54003, 0x960 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x236 }, + { 0x54007, 0x2000 }, + { 0x54008, 0x303 }, + { 0x54009, 0x200 }, + { 0x5400b, 0x31f }, + { 0x5400c, 0xc8 }, + { 0x54012, 0x1 }, + { 0x5402f, 0x834 }, + { 0x54030, 0x1 }, + { 0x54031, 0x18 }, + { 0x54032, 0x240 }, + { 0x54033, 0x200 }, + { 0x54034, 0x640 }, + { 0x54035, 0x816 }, + { 0x54036, 0x103 }, + { 0x5403f, 0x1323 }, + { 0x541fc, 0x100 }, + { 0xd0000, 0x1 }, +}; + + +/* P1 message block paremeter for training firmware */ +struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x80 }, + { 0x54002, 0x1 }, + { 0x54003, 0x640 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x236 }, + { 0x54007, 0x2000 }, + { 0x54008, 0x303 }, + { 0x54009, 0x200 }, + { 0x5400b, 0x21f }, + { 0x5400c, 0xc8 }, + { 0x54012, 0x1 }, + { 0x5402f, 0x210 }, + { 0x54030, 0x1 }, + { 0x54032, 0x40 }, + { 0x54033, 0x200 }, + { 0x54034, 0x640 }, + { 0x54035, 0x416 }, + { 0x54036, 0x103 }, + { 0x5403f, 0x1323 }, + { 0x541fc, 0x100 }, + { 0xd0000, 0x1 }, +}; + + +/* P2 message block paremeter for training firmware */ +struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x80 }, + { 0x54002, 0x2 }, + { 0x54003, 0x428 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x236 }, + { 0x54007, 0x2000 }, + { 0x54008, 0x303 }, + { 0x54009, 0x200 }, + { 0x5400b, 0x21f }, + { 0x5400c, 0xc8 }, + { 0x54012, 0x1 }, + { 0x54030, 0x1 }, + { 0x54032, 0x40 }, + { 0x54033, 0x200 }, + { 0x54034, 0x640 }, + { 0x54035, 0x16 }, + { 0x54036, 0x103 }, + { 0x5403f, 0x1323 }, + { 0x541fc, 0x100 }, + { 0xd0000, 0x1 }, +}; + + +/* P0 2D message block paremeter for training firmware */ +struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x80 }, + { 0x54003, 0x960 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x236 }, + { 0x54007, 0x2000 }, + { 0x54008, 0x303 }, + { 0x54009, 0x200 }, + { 0x5400b, 0x61 }, + { 0x5400c, 0x1c8 }, + { 0x5400d, 0x101 }, + { 0x5400e, 0x1f7f }, + { 0x54012, 0x1 }, + { 0x5402f, 0x834 }, + { 0x54030, 0x1 }, + { 0x54031, 0x18 }, + { 0x54032, 0x240 }, + { 0x54033, 0x200 }, + { 0x54034, 0x640 }, + { 0x54035, 0x816 }, + { 0x54036, 0x103 }, + { 0x5403f, 0x1323 }, + { 0x541fc, 0x100 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x2 }, + { 0x90033, 0x10 }, + { 0x90034, 0x139 }, + { 0x90035, 0xf }, + { 0x90036, 0x7c0 }, + { 0x90037, 0x139 }, + { 0x90038, 0x44 }, + { 0x90039, 0x630 }, + { 0x9003a, 0x159 }, + { 0x9003b, 0x14f }, + { 0x9003c, 0x630 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x47 }, + { 0x9003f, 0x630 }, + { 0x90040, 0x149 }, + { 0x90041, 0x4f }, + { 0x90042, 0x630 }, + { 0x90043, 0x179 }, + { 0x90044, 0x8 }, + { 0x90045, 0xe0 }, + { 0x90046, 0x109 }, + { 0x90047, 0x0 }, + { 0x90048, 0x7c8 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x1 }, + { 0x9004c, 0x8 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x45a }, + { 0x9004f, 0x9 }, + { 0x90050, 0x0 }, + { 0x90051, 0x448 }, + { 0x90052, 0x109 }, + { 0x90053, 0x40 }, + { 0x90054, 0x630 }, + { 0x90055, 0x179 }, + { 0x90056, 0x1 }, + { 0x90057, 0x618 }, + { 0x90058, 0x109 }, + { 0x90059, 0x40c0 }, + { 0x9005a, 0x630 }, + { 0x9005b, 0x149 }, + { 0x9005c, 0x8 }, + { 0x9005d, 0x4 }, + { 0x9005e, 0x48 }, + { 0x9005f, 0x4040 }, + { 0x90060, 0x630 }, + { 0x90061, 0x149 }, + { 0x90062, 0x0 }, + { 0x90063, 0x4 }, + { 0x90064, 0x48 }, + { 0x90065, 0x40 }, + { 0x90066, 0x630 }, + { 0x90067, 0x149 }, + { 0x90068, 0x10 }, + { 0x90069, 0x4 }, + { 0x9006a, 0x18 }, + { 0x9006b, 0x0 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x78 }, + { 0x9006e, 0x549 }, + { 0x9006f, 0x630 }, + { 0x90070, 0x159 }, + { 0x90071, 0xd49 }, + { 0x90072, 0x630 }, + { 0x90073, 0x159 }, + { 0x90074, 0x94a }, + { 0x90075, 0x630 }, + { 0x90076, 0x159 }, + { 0x90077, 0x441 }, + { 0x90078, 0x630 }, + { 0x90079, 0x149 }, + { 0x9007a, 0x42 }, + { 0x9007b, 0x630 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x1 }, + { 0x9007e, 0x630 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x0 }, + { 0x90081, 0xe0 }, + { 0x90082, 0x109 }, + { 0x90083, 0xa }, + { 0x90084, 0x10 }, + { 0x90085, 0x109 }, + { 0x90086, 0x9 }, + { 0x90087, 0x3c0 }, + { 0x90088, 0x149 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x159 }, + { 0x9008c, 0x18 }, + { 0x9008d, 0x10 }, + { 0x9008e, 0x109 }, + { 0x9008f, 0x0 }, + { 0x90090, 0x3c0 }, + { 0x90091, 0x109 }, + { 0x90092, 0x18 }, + { 0x90093, 0x4 }, + { 0x90094, 0x48 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x58 }, + { 0x90098, 0xa }, + { 0x90099, 0x10 }, + { 0x9009a, 0x109 }, + { 0x9009b, 0x2 }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x7 }, + { 0x9009f, 0x7c0 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x10 }, + { 0x900a2, 0x10 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x8140 }, + { 0x900a6, 0x10c }, + { 0x900a7, 0x10 }, + { 0x900a8, 0x8138 }, + { 0x900a9, 0x10c }, + { 0x900aa, 0x8 }, + { 0x900ab, 0x7c8 }, + { 0x900ac, 0x101 }, + { 0x900ad, 0x8 }, + { 0x900ae, 0x0 }, + { 0x900af, 0x8 }, + { 0x900b0, 0x8 }, + { 0x900b1, 0x448 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0xf }, + { 0x900b4, 0x7c0 }, + { 0x900b5, 0x109 }, + { 0x900b6, 0x47 }, + { 0x900b7, 0x630 }, + { 0x900b8, 0x109 }, + { 0x900b9, 0x8 }, + { 0x900ba, 0x618 }, + { 0x900bb, 0x109 }, + { 0x900bc, 0x8 }, + { 0x900bd, 0xe0 }, + { 0x900be, 0x109 }, + { 0x900bf, 0x0 }, + { 0x900c0, 0x7c8 }, + { 0x900c1, 0x109 }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x8140 }, + { 0x900c4, 0x10c }, + { 0x900c5, 0x0 }, + { 0x900c6, 0x1 }, + { 0x900c7, 0x8 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x4 }, + { 0x900ca, 0x8 }, + { 0x900cb, 0x8 }, + { 0x900cc, 0x7c8 }, + { 0x900cd, 0x101 }, + { 0x90006, 0x0 }, + { 0x90007, 0x0 }, + { 0x90008, 0x8 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x0 }, + { 0x9000b, 0x0 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x90026, 0x2c }, + { 0x2000b, 0x4b }, + { 0x2000c, 0x96 }, + { 0x2000d, 0x5dc }, + { 0x2000e, 0x2c }, + { 0x12000b, 0x32 }, + { 0x12000c, 0x64 }, + { 0x12000d, 0x3e8 }, + { 0x12000e, 0x2c }, + { 0x22000b, 0x21 }, + { 0x22000c, 0x42 }, + { 0x22000d, 0x299 }, + { 0x22000e, 0x21 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0xffff }, + { 0x90013, 0x6152 }, + { 0xc0080, 0x0 }, + { 0xd0000, 0x1 } +}; + +struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 2400mts 1D */ + .drate = 2400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 1600mts 1D */ + .drate = 1600, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 1064mts 1D */ + .drate = 1064, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 2400mts 2D */ + .drate = 2400, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 2400, 1600, 1064, }, +}; + diff --git a/board/freescale/imx8mq_val/spl.c b/board/freescale/imx8mq_val/spl.c index 6b385c7161..c9461c087e 100644 --- a/board/freescale/imx8mq_val/spl.c +++ b/board/freescale/imx8mq_val/spl.c @@ -25,14 +25,23 @@ #include <spl.h> #include "../common/pfuze.h" #include <nand.h> + +#ifdef CONFIG_TARGET_IMX8MQ_DDR3L_VAL #include "ddr/ddr.h" +#else +#include <asm/arch/ddr.h> +#endif DECLARE_GLOBAL_DATA_PTR; void spl_dram_init(void) { /* ddr init */ +#ifdef CONFIG_TARGET_IMX8MQ_DDR3L_VAL ddr_init(NULL); +#else + ddr_init(&dram_timing); +#endif } #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) |