diff options
| author | Chris Packham <judge.packham@gmail.com> | 2018-05-10 13:28:29 +1200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2018-05-14 10:01:56 +0200 |
| commit | 2b4ffbf6b4944a0b3125fd2c9c0ba3568264367a (patch) | |
| tree | dc75d0e07677505b8611a670483a349f214c9e75 /board/gdsys | |
| parent | 00a7767766ace1f3ca3de7f9d44e145b9092bbad (diff) | |
ARM: mvebu: a38x: sync ddr training code with upstream
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT
INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.
Some now empty files are removed and the ternary license is replaced
with a SPDX GPL-2.0+ identifier.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/gdsys')
| -rw-r--r-- | board/gdsys/a38x/controlcenterdc.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index 5599767dff..f750e47b72 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -12,7 +12,7 @@ #include <asm/arch/cpu.h> #include <asm-generic/gpio.h> -#include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h" +#include "../drivers/ddr/marvell/a38x/ddr3_init.h" #include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h" #include "keyprogram.h" @@ -39,7 +39,8 @@ DECLARE_GLOBAL_DATA_PTR; * be used by the DDR3 init code in the SPL U-Boot version to configure * the DDR3 controller. */ -static struct hws_topology_map ddr_topology_map = { +static struct mv_ddr_topology_map ddr_topology_map = { + DEBUG_LEVEL_ERROR, 0x1, /* active interfaces */ /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */ { { { {0x1, 0, 0, 0}, @@ -48,14 +49,16 @@ static struct hws_topology_map ddr_topology_map = { {0x1, 0, 0, 0}, {0x1, 0, 0, 0} }, SPEED_BIN_DDR_1600K, /* speed_bin */ - BUS_WIDTH_16, /* memory_width */ - MEM_4G, /* mem_size */ + MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ + MV_DDR_DIE_CAP_4GBIT, /* mem_size */ DDR_FREQ_533, /* frequency */ 0, 0, /* cas_wl cas_l */ - HWS_TEMP_LOW, /* temperature */ - HWS_TIM_DEFAULT} }, /* timing */ - 5, /* Num Of Bus Per Interface*/ - BUS_MASK_32BIT /* Busses mask */ + MV_DDR_TEMP_LOW} }, /* temperature */ + BUS_MASK_32BIT, /* Busses mask */ + MV_DDR_CFG_DEFAULT, /* ddr configuration data source */ + { {0} }, /* raw spd data */ + {0} /* timing parameters */ + }; static struct serdes_map serdes_topology_map[] = { @@ -121,7 +124,7 @@ void board_pex_config(void) #endif } -struct hws_topology_map *ddr3_get_topology_map(void) +struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) { return &ddr_topology_map; } |