summaryrefslogtreecommitdiff
path: root/board/isee
diff options
context:
space:
mode:
authorPau Pajuelo <ppajuel@gmail.com>2017-08-17 03:09:14 +0200
committerTom Rini <trini@konsulko.com>2017-08-26 14:56:12 -0400
commit195dc23185400fa605d268c3d903c83286ecae37 (patch)
tree150654fbc9101cf12a74f53ed1289276f17a40b9 /board/isee
parent4c699a4747e763e82cc813c955d318b966303b81 (diff)
igep00x0: merge igep0020 and igep0030 defconfigs to igep00x0_defconfig
Update igep00x0 code with the following features: - Add board and revision detection for the boards: - IGEP0020-RF - IGEP0020-RC - IGEP0030-RG - IGEP0030-RE - Merge IGEP0020 and IGEP0030 mux tables - Add suport to use GPIO_126, GPIO_127 and GPIO_129 - board_name and board_rev environment variables display board and revision informations - Move dtb name selection from code to boot script Signed-off-by: Pau Pajuelo <ppajuel@gmail.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Diffstat (limited to 'board/isee')
-rw-r--r--board/isee/igep00x0/MAINTAINERS3
-rw-r--r--board/isee/igep00x0/common.c12
-rw-r--r--board/isee/igep00x0/igep00x0.c90
-rw-r--r--board/isee/igep00x0/igep00x0.h13
4 files changed, 89 insertions, 29 deletions
diff --git a/board/isee/igep00x0/MAINTAINERS b/board/isee/igep00x0/MAINTAINERS
index 720ef2aa69..d75d400eed 100644
--- a/board/isee/igep00x0/MAINTAINERS
+++ b/board/isee/igep00x0/MAINTAINERS
@@ -3,6 +3,5 @@ M: Enric Balletbo i Serra <eballetbo@gmail.com>
S: Maintained
F: board/isee/igep00x0/
F: include/configs/omap3_igep00x0.h
-F: configs/igep0020_defconfig
-F: configs/igep0030_defconfig
+F: configs/igep00x0_defconfig
F: configs/igep0032_defconfig
diff --git a/board/isee/igep00x0/common.c b/board/isee/igep00x0/common.c
index b8f1c14f6a..e59516f612 100644
--- a/board/isee/igep00x0/common.c
+++ b/board/isee/igep00x0/common.c
@@ -22,14 +22,6 @@ DECLARE_GLOBAL_DATA_PTR;
void set_muxconf_regs(void)
{
MUX_DEFAULT();
-
-#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
- MUX_IGEP0020();
-#endif
-
-#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
- MUX_IGEP0030();
-#endif
}
/*
@@ -60,10 +52,6 @@ int board_init(void)
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
-#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE)
- status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON);
-#endif
-
return 0;
}
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 74f9bab093..5c7f256711 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -17,7 +17,6 @@
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/sys_proto.h>
-#include <asm/mach-types.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/onenand.h>
@@ -38,6 +37,43 @@ U_BOOT_DEVICE(igep_uart) = {
&igep_serial
};
+/*
+ * Routine: get_board_revision
+ * Description: GPIO_28 and GPIO_129 are used to read board and revision from
+ * IGEP00x0 boards. First of all, it is necessary to reset USB transceiver from
+ * IGEP0030 in order to read GPIO_IGEP00X0_BOARD_DETECTION correctly, because
+ * this functionality is shared by USB HOST.
+ * Once USB reset is applied, U-boot configures these pins as input pullup to
+ * detect board and revision:
+ * IGEP0020-RF = 0b00
+ * IGEP0020-RC = 0b01
+ * IGEP0030-RG = 0b10
+ * IGEP0030-RE = 0b11
+ */
+static int get_board_revision(void)
+{
+ int revision;
+
+ gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
+ "igep0030_usb_transceiver_reset");
+ gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
+
+ gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
+ gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
+ revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
+ gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
+
+ gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
+ "igep00x0_revision_detection");
+ gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
+ revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
+ gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
+
+ gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
+
+ return revision;
+}
+
int onenand_board_init(struct mtd_info *mtd)
{
if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
@@ -138,31 +174,69 @@ int ft_board_setup(void *blob, bd_t *bd)
}
#endif
-void set_fdt(void)
+void set_led(void)
{
- switch (gd->bd->bi_arch_number) {
- case MACH_TYPE_IGEP0020:
- env_set("fdtfile", "omap3-igep0020.dtb");
+ switch (get_board_revision()) {
+ case 0:
+ case 1:
+ gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
+ gpio_direction_output(IGEP0020_GPIO_LED, 1);
break;
- case MACH_TYPE_IGEP0030:
- env_set("fdtfile", "omap3-igep0030.dtb");
+ case 2:
+ case 3:
+ gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
+ gpio_direction_output(IGEP0030_GPIO_LED, 0);
+ break;
+ default:
+ /* Should not happen... */
break;
}
}
+void set_boardname(void)
+{
+ char rev[5] = { 'F','C','G','E', };
+ int i = get_board_revision();
+
+ rev[i+1] = 0;
+ env_set("board_rev", rev + i);
+ env_set("board_name", i < 2 ? "igep0020" : "igep0030");
+}
+
/*
* Routine: misc_init_r
* Description: Configure board specific parts
*/
int misc_init_r(void)
{
+ t2_t *t2_base = (t2_t *)T2_BASE;
+ u32 pbias_lite;
+
twl4030_power_init();
+ /* set VSIM to 1.8V */
+ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
+ TWL4030_PM_RECEIVER_VSIM_VSEL_18,
+ TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
+ TWL4030_PM_RECEIVER_DEV_GRP_P1);
+
+ /* set up dual-voltage GPIOs to 1.8V */
+ pbias_lite = readl(&t2_base->pbias_lite);
+ pbias_lite &= ~PBIASLITEVMODE1;
+ pbias_lite |= PBIASLITEPWRDNZ1;
+ writel(pbias_lite, &t2_base->pbias_lite);
+ if (get_cpu_family() == CPU_OMAP36XX)
+ writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
+ OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
+ OMAP34XX_CTRL_WKUP_CTRL);
+
setup_net_chip();
omap_die_id_display();
- set_fdt();
+ set_led();
+
+ set_boardname();
return 0;
}
diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h
index 5698efab5d..1cbe7c94d9 100644
--- a/board/isee/igep00x0/igep00x0.h
+++ b/board/isee/igep00x0/igep00x0.h
@@ -103,6 +103,8 @@
MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\
MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\
MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\
+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /* UART1_TX */\
+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /* UART1_RX */\
MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\
MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\
MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\
@@ -117,13 +119,10 @@
MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /* GPIO_6 */\
MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\
MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTU | EN | M4)) /* GPIO_28 */\
+ MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M4)) /* GPIO_54 */\
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /* GPIO_64 */\
+ MUX_VAL(CP(GPIO129), (IEN | PTU | EN | M4)) /* GPIO_129 */\
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\
MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */
#endif
-
-#define MUX_IGEP0020() \
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /* GPIO_64-ETH_NRST */\
-
-#define MUX_IGEP0030() \
- MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /* UART1_TX */\
- MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /* UART1_RX */