diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2016-11-30 13:41:56 -0800 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2017-01-11 15:45:22 +0100 |
| commit | 8c4c51a1d23bcbcdaaa27112abef6a26573217bc (patch) | |
| tree | e644d1ee1ba316d85acd90027859ac3fcf85fc75 /board/toradex/colibri_vf/colibri_vf.c | |
| parent | 4651389e445d31e785320a5d09c74d24e7671eed (diff) | |
colibri_vf: use same NAND clock as Linux uses
Currently a divider of 6 has been used, leading to following NAND
Flash Controller (NFC) clocks:
VF61: 27.7 MHz (166.7MHz bus clock)
VF50: 22 MHz (132MHz bus clock)
The NAND Flash Memory used on VF50 allows to use clock speed of
up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can
use the same divider of 4 on both modules to configure the maximal
possible clock speeds:
VF61: 41.7 MHz
VF50: 33 MHz
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit 0eba4c41ca18f8f009126dcacc647927accaa63d)
Diffstat (limited to 'board/toradex/colibri_vf/colibri_vf.c')
| -rw-r--r-- | board/toradex/colibri_vf/colibri_vf.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 15f263c51e..7b74eb7e9d 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -428,7 +428,7 @@ static void clock_init(void) CCM_CSCDR2_ESDHC1_EN | CCM_CSCDR2_ESDHC1_CLK_DIV(0) | CCM_CSCDR2_NFC_EN); clrsetbits_le32(&ccm->cscdr3, CCM_REG_CTRL_MASK, - CCM_CSCDR3_NFC_PRE_DIV(5)); + CCM_CSCDR3_NFC_PRE_DIV(3)); clrsetbits_le32(&ccm->cscmr2, CCM_REG_CTRL_MASK, CCM_CSCMR2_RMII_CLK_SEL(2)); } |