diff options
| author | Igor Opaniuk <igor.opaniuk@toradex.com> | 2020-09-18 14:39:53 +0300 |
|---|---|---|
| committer | Denys Drozdov <denys.drozdov@toradex.com> | 2021-01-08 19:42:08 +0200 |
| commit | 9069ec716bc7a3fb534a645bbd055dd2925478ac (patch) | |
| tree | 2809c281534370fbbb1455ef9829369637f817fe /board/toradex | |
| parent | 7f104af86f9866d48929a631df302139adc6354a (diff) | |
apalis-imx8: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory layout.
Relates-to: ELB-3031
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Diffstat (limited to 'board/toradex')
| -rw-r--r-- | board/toradex/apalis-imx8/apalis-imx8.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 5fbbbb3af4..1add6fba66 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -69,6 +69,29 @@ static void setup_iomux_uart(void) imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +void board_mem_get_layout(uint64_t *phys_sdram_1_start, + uint64_t *phys_sdram_1_size, + uint64_t *phys_sdram_2_start, + uint64_t *phys_sdram_2_size) +{ + uint32_t is_quadplus = 0, val = 0; + sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val); + + if (sciErr == SC_ERR_NONE) { + /* QP has one A72 core disabled */ + is_quadplus = ((val >> 4) & 0x3) != 0x0; + } + + *phys_sdram_1_start = PHYS_SDRAM_1; + *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; + *phys_sdram_2_start = PHYS_SDRAM_2; + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; +} + int board_early_init_f(void) { sc_pm_clock_rate_t rate = SC_80MHZ; |