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authorWolfgang Denk <wd@denx.de>2008-07-13 14:44:04 +0200
committerWolfgang Denk <wd@denx.de>2008-07-13 14:44:04 +0200
commit0740ac26f4e590bf5b4e7b9a9886208dc2dacb32 (patch)
tree5d18fcb91d491f602c17c550af70a9a092b883f8 /board
parentaf577da58642b81eb94067e3d9e9dc6998cd620d (diff)
parent47bf9c71ae838305a3ea3161af8d14e6f3fc2c82 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-coldfire
Diffstat (limited to 'board')
-rw-r--r--board/BuS/EB+MCF-EV123/mii.c2
-rw-r--r--board/cobra5272/mii.c2
-rw-r--r--board/freescale/m5235evb/m5235evb.c3
3 files changed, 5 insertions, 2 deletions
diff --git a/board/BuS/EB+MCF-EV123/mii.c b/board/BuS/EB+MCF-EV123/mii.c
index 3ea20a6109..8ae2ec69ce 100644
--- a/board/BuS/EB+MCF-EV123/mii.c
+++ b/board/BuS/EB+MCF-EV123/mii.c
@@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev)
}
#endif /* CFG_DISCOVER_PHY */
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
void __mii_init(void)
{
diff --git a/board/cobra5272/mii.c b/board/cobra5272/mii.c
index d0a4a39f99..b30ba803f9 100644
--- a/board/cobra5272/mii.c
+++ b/board/cobra5272/mii.c
@@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev)
}
#endif /* CFG_DISCOVER_PHY */
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
void __mii_init(void)
{
diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c
index c2c8fe8590..bd8a4e5e68 100644
--- a/board/freescale/m5235evb/m5235evb.c
+++ b/board/freescale/m5235evb/m5235evb.c
@@ -75,9 +75,11 @@ phys_size_t initdram(int board_type)
sdram->dacr0 =
SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 |
SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32;
+ asm("nop");
/* Initialize DMR0 */
sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V;
+ asm("nop");
/* Set IP (bit 3) in DACR */
sdram->dacr0 |= SDRAMC_DARCn_IP;
@@ -100,6 +102,7 @@ phys_size_t initdram(int board_type)
/* Finish the configuration by issuing the MRS. */
sdram->dacr0 |= SDRAMC_DARCn_IMRS;
+ asm("nop");
/* Write to the SDRAM Mode Register */
*(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696;