diff options
| author | Dominik Sliwa <dominik.sliwa@toradex.com> | 2018-07-12 11:22:51 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2018-07-27 16:12:35 +0200 |
| commit | f4db39ecb6319affd10b5a10212d7af3148ca731 (patch) | |
| tree | a2d34a87e07017e6b70b8b2fe68a35452bae742b /board | |
| parent | 827db15d67c0462b374e8b3969364e75ccadd99e (diff) | |
apalis-tk1: remove non-esential power rails on boot
When mainline kernels reboot TK1 they use SW_RESET,
that reset mode does not reset PMIC. Some rails
need to be off for RAM Re-repair to work correctly.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/toradex/apalis-tk1/as3722_init.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c index 4917034e1a..6911f79d14 100644 --- a/board/toradex/apalis-tk1/as3722_init.c +++ b/board/toradex/apalis-tk1/as3722_init.c @@ -44,6 +44,29 @@ void pmic_enable_cpu_vdd(void) udelay(10 * 1000); #endif + /* + * Make sure all non-fused regulators are down. + * That way we're in known state after software reboot from linux + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES); + udelay(10 * 1000); + debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); /* * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. |