diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-01-03 13:27:34 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2012-01-03 14:06:33 -0800 |
| commit | a371cd8fe159132bdd9bf08b8b9a4a5f08b11387 (patch) | |
| tree | 5da4e7834e3b197e16617e4220e208f748d936ae /board | |
| parent | ae23071e4528961593a6c9cf8e490e906cdd5ab0 (diff) | |
CHROMIUMOS: Issue SMI to finalize Coreboot in final stage
This will write magic value to APMC command port which
will trigger an SMI and cause coreboot to lock down
the ME, chipset, and CPU.
BUG=chrome-os-partner:6609
TEST=boot on stumpy+celeron and lumpy+i5 and ensure
the system still boots and that registers are locked
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: Ib30ea83044f5123205531a5e8ee88ee37de2dd86
Reviewed-on: https://gerrit.chromium.org/gerrit/13604
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Diffstat (limited to 'board')
| -rw-r--r-- | board/chromebook-x86/coreboot/coreboot.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c index 06c610c131..2b3d11b12e 100644 --- a/board/chromebook-x86/coreboot/coreboot.c +++ b/board/chromebook-x86/coreboot/coreboot.c @@ -272,6 +272,10 @@ int board_final_cleanup(void) enable_cache(); } + /* Issue SMI to Coreboot to lock down ME and registers */ + printf("Finalizing Coreboot\n"); + outb(0xcb, 0xb2); + return 0; } |