diff options
| author | Marek Vasut <marex@denx.de> | 2020-06-20 14:28:25 +0200 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2020-06-24 09:51:22 +0800 |
| commit | d581076a33e7fd1f2b019a0a53eebe58d76623c1 (patch) | |
| tree | 5a413ab1449c27880ad0ebcc91574607a5ada609 /cmd | |
| parent | 4ff63383e3497389e66cf70943a83bdb1810462a (diff) | |
cmd: mmc: Cache-align extcsd read target
The extcsd read target must be cache aligned in case the controller
uses DMA to read the extcsd register, make it so.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Diffstat (limited to 'cmd')
| -rw-r--r-- | cmd/mmc.c | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -8,6 +8,7 @@ #include <blk.h> #include <command.h> #include <console.h> +#include <memalign.h> #include <mmc.h> #include <part.h> #include <sparse_format.h> @@ -56,7 +57,8 @@ static void print_mmcinfo(struct mmc *mmc) if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) { bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0; bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR); - u8 wp, ext_csd[MMC_MAX_BLOCK_LEN]; + ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); + u8 wp; int ret; #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |