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| author | Tom Rini <trini@konsulko.com> | 2020-04-28 16:15:47 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-04-28 16:15:47 -0400 |
| commit | 556fd590db78def1cb92b0e887c665d3b75f7519 (patch) | |
| tree | e99e20f537c7d5f3fe823f53d40db51b8fe65831 /configs/chromebook_speedy_defconfig | |
| parent | dd2c676a659a03daeef31d1221da2edff009d426 (diff) | |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/chromebook_speedy_defconfig')
| -rw-r--r-- | configs/chromebook_speedy_defconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 34cf727abc..b4116a34e6 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBOOK_SPEEDY=y @@ -11,8 +12,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" @@ -24,9 +26,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_CRC32_SUPPORT is not set -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y |