diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2020-05-09 22:26:24 +0530 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2020-05-22 20:53:20 +0800 |
| commit | 0672e9803b88cbc8268ee65120cfa27fe8e2fb82 (patch) | |
| tree | b6571b0463b336c4ebdcd30dab0cf0912d3f7e47 /configs/rock960-rk3399_defconfig | |
| parent | 765a12d6a39ee2151421c5fc0250d9eefdf0e085 (diff) | |
rockchip: Enable PCIe/M.2 on rock960 board
Due to board limitation some SSD's would work
on rock960 PCIe M.2 only with 1.8V IO domain.
So, this patch enables grf io_sel explicitly to
make PCIe/M.2 to work.
Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'configs/rock960-rk3399_defconfig')
| -rw-r--r-- | configs/rock960-rk3399_defconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 045d989a19..64517f9623 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y @@ -19,6 +20,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_PMIC=y @@ -36,10 +38,13 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_DM_ETH=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y |