diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2018-06-03 19:04:17 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2018-06-13 09:50:57 +0800 |
| commit | fb05f0b02b01aed48db48f02a15e52c6de2d0dac (patch) | |
| tree | d2c81587706d01d4ec701c6d34faf7c7e068ca8e /doc/README.x86 | |
| parent | 80abc8165e658f4538ef2ab00ceba118e097dbfd (diff) | |
x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted
on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
the actual BIOS image which is U-Boot. Building a single image with
both ME firmware and U-Boot does not make sense.
This also describes the exact flash location where the u-boot.rom
should be programmed in the documentation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/README.x86')
| -rw-r--r-- | doc/README.x86 | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/doc/README.x86 b/doc/README.x86 index 04f02202b4..78664c3d0a 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -256,7 +256,9 @@ the board manual. The SPI-0 flash should have flash descriptor plus ME firmware and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0 flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program this image to the SPI-0 flash according to the board manual just once and we are -all set. For programming U-Boot we just need to program SPI-1 flash. +all set. For programming U-Boot we just need to program SPI-1 flash. Since the +default u-boot.rom image for this board is set to 2MB, it should be programmed +to the last 2MB of the 8MB chip, address range [600000, 7FFFFF]. --- |