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authorMarek Vasut <marex@denx.de>2018-04-23 22:49:31 +0200
committerMarek Vasut <marex@denx.de>2018-05-18 10:30:46 +0200
commit32f99757f4af48d1e51fdc8817bfed4337dead42 (patch)
treeaf4fe597350d22de14cbf14d550efe1b9a25a70b /drivers/ddr
parent6b49cdd27ed2364543134b12ed6d8351f74b904b (diff)
ARM: socfpga: Repair A10 EMAC reset handling
The EMAC reset and PHY mode configuration was never working on the Arria10 SoC, fix this. This patch pulls out the common code into misc.c and passes the SoC-specific function call in as a function pointer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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