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authorAlex Marginean <alexandru.marginean@nxp.com>2019-11-14 18:28:34 +0200
committerJoe Hershberger <joe.hershberger@ni.com>2019-12-09 09:47:43 -0600
commit05f86070c0722015520ceb172b22070db5d0aa35 (patch)
tree552ccfe317690addca7e16e8a66a21e657d7021c /drivers/net/phy
parent7552ee9a01b838b95a1d486355b40dfe1ed2ad2f (diff)
drivers: net: aquantia: set SMBus addr based on DT property
Aquantia PHYs have a SMBus interface mostly used for debug. The addresses on this interface are normally set up by PHY firmware, but depending on the board they may end up not being unique. Add an optional DT property used to change SMBus address if needed. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/aquantia.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 3b036d01c7..3992a97712 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -94,6 +94,9 @@
#define AQUANTIA_VND1_GSYSCFG_5G 3
#define AQUANTIA_VND1_GSYSCFG_10G 4
+#define AQUANTIA_VND1_SMBUS0 0xc485
+#define AQUANTIA_VND1_SMBUS1 0xc495
+
/* addresses of memory segments in the phy */
#define DRAM_BASE_ADDR 0x3FFE0000
#define IRAM_BASE_ADDR 0x40000000
@@ -355,6 +358,18 @@ static int aquantia_dts_config(struct phy_device *phydev)
phy_write(phydev, MDIO_MMD_PMAPMD, AQUANTIA_PMA_RX_VENDOR_P1,
reg);
}
+ if (!ofnode_read_u32(node, "smb-addr", &prop)) {
+ debug("smb-addr = %x\n", (int)prop);
+ /*
+ * there are two addresses here, normally just one bus would
+ * be in use so we're setting both regs using the same DT
+ * property.
+ */
+ phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_SMBUS0,
+ (u16)(prop << 1));
+ phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_SMBUS1,
+ (u16)(prop << 1));
+ }
#endif
return 0;