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authorSimon Glass <sjg@chromium.org>2018-10-01 12:22:40 -0600
committerSimon Glass <sjg@chromium.org>2018-10-09 04:40:27 -0600
commit5d9a88f44a93daf623906fee7ca20fa396460ae2 (patch)
tree1ce98cc7c8752f59280d131a8ad0cb2c32ac6071 /drivers/pwm
parentd07b6e145ec2f0e77aab0fbe15dfd87f40170a8c (diff)
test: panel: Add a test for the panel uclass
At present this uclass has no tests. Add a simple one which checks the PWM configuration, regulator and GPIO. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/sandbox_pwm.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c
index 4b50b19c61..28988187e0 100644
--- a/drivers/pwm/sandbox_pwm.c
+++ b/drivers/pwm/sandbox_pwm.c
@@ -14,6 +14,14 @@ enum {
NUM_CHANNELS = 3,
};
+/**
+ * struct sandbox_pwm_chan - a sandbox PWM channel
+ *
+ * @period_ns: Period of the PWM in nanoseconds
+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
+ * @enable: true if the PWM is enabled
+ * @polarity: true if the PWM polarity is active high
+ */
struct sandbox_pwm_chan {
uint period_ns;
uint duty_ns;
@@ -25,6 +33,23 @@ struct sandbox_pwm_priv {
struct sandbox_pwm_chan chan[NUM_CHANNELS];
};
+int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
+ uint *duty_nsp, bool *enablep, bool *polarityp)
+{
+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+ struct sandbox_pwm_chan *chan;
+
+ if (channel >= NUM_CHANNELS)
+ return -ENOSPC;
+ chan = &priv->chan[channel];
+ *period_nsp = chan->period_ns;
+ *duty_nsp = chan->duty_ns;
+ *enablep = chan->enable;
+ *polarityp = chan->polarity;
+
+ return 0;
+}
+
static int sandbox_pwm_set_config(struct udevice *dev, uint channel,
uint period_ns, uint duty_ns)
{