diff options
| author | masakazu.mochizuki.wd@hitachi.com <masakazu.mochizuki.wd@hitachi.com> | 2016-04-12 17:11:41 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2016-08-17 10:25:35 +0900 |
| commit | 6f107e4cf6f9c7beddad5878e83436823bff3fa8 (patch) | |
| tree | 6bec3d3e71ab7ea685c1d3210737a4507c714f25 /drivers/serial | |
| parent | 759319468505f4b6179c5fc4e3a682f2b2f44b3c (diff) | |
arm: rmobile: Add BLANCHE board support
BLANCHE is development board based on R-Car V2H SoC (R8A7792)
This commit supports the following periherals:
- SCIF, Ethernet, QSPI, MMC
Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_sh.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index a95684bc0d..348f544d0a 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -225,8 +225,8 @@ struct uart_port { # define SCIF_ORER 0x0001 /* Overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ - defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) || \ - defined(CONFIG_R8A7795) + defined(CONFIG_R8A7792) || defined(CONFIG_R8A7793) || \ + defined(CONFIG_R8A7794) || defined(CONFIG_R8A7795) # if defined(CONFIG_SCIF_A) # define SCIF_ORER 0x0200 # else @@ -308,7 +308,7 @@ struct uart_port { /* SH7763 SCIF2 support */ # define SCIF2_RFDC_MASK 0x001f # define SCIF2_TXROOM_MAX 16 -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ +#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) # if defined(CONFIG_SCIF_A) @@ -566,7 +566,7 @@ SCIF_FNS(SCFCR, 0x18, 16) SCIF_FNS(SCFDR, 0x1c, 16) SCIF_FNS(SCLSR, 0x24, 16) SCIF_FNS(DL, 0x00, 0) /* dummy */ -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ +#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) /* SCIFA and SCIF register offsets and size */ SCIx_FNS(SCSMR, 0, 0, 0x00, 16, 0, 0, 0x00, 16, 0, 0) @@ -762,7 +762,7 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk) #define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) -#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ +#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */ #if defined(CONFIG_SCIF_A) |