diff options
| author | yannick fertre <yannick.fertre@st.com> | 2018-03-02 15:59:25 +0100 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2018-03-19 10:52:30 +0100 |
| commit | e6194ce6124aab625a984fd8d1599c2862dcf532 (patch) | |
| tree | 28e9e294fd25d1543ad586a042696c4d0831af36 /drivers/video | |
| parent | 75fa711ac89d80e32e6f56d328d2e071e2a28fab (diff) | |
video: stm32: stm32_ltdc: set the blending factor
Set the blending factor regarding the pixel format
Signed-off-by: yannick fertre <yannick.fertre@st.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/stm32/stm32_ltdc.c | 41 |
1 files changed, 35 insertions, 6 deletions
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 6c3557b06f..e160c77e07 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -138,7 +138,9 @@ struct stm32_ltdc_priv { #define LXCFBLNR_CFBLN GENMASK(10, 0) /* Color Frame Buffer Line Number */ #define BF1_PAXCA 0x600 /* Pixel Alpha x Constant Alpha */ +#define BF1_CA 0x400 /* Constant Alpha */ #define BF2_1PAXCA 0x007 /* 1 - (Pixel Alpha x Constant Alpha) */ +#define BF2_1CA 0x005 /* 1 - Constant Alpha */ enum stm32_ltdc_pix_fmt { PF_ARGB8888 = 0, @@ -161,11 +163,17 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp) pf = PF_RGB565; break; + case VIDEO_BPP32: + pf = PF_ARGB8888; + break; + + case VIDEO_BPP8: + pf = PF_L8; + break; + case VIDEO_BPP1: case VIDEO_BPP2: case VIDEO_BPP4: - case VIDEO_BPP8: - case VIDEO_BPP32: default: debug("%s: warning %dbpp not supported yet, %dbpp instead\n", __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16)); @@ -178,6 +186,23 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp) return (u32)pf; } +static bool has_alpha(u32 fmt) +{ + switch (fmt) { + case PF_ARGB8888: + case PF_ARGB1555: + case PF_ARGB4444: + case PF_AL44: + case PF_AL88: + return true; + case PF_RGB888: + case PF_RGB565: + case PF_L8: + default: + return false; + } +} + static void stm32_ltdc_enable(struct stm32_ltdc_priv *priv) { /* Reload configuration immediately & enable LTDC */ @@ -247,6 +272,7 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr) u32 line_length; u32 bus_width; u32 val, tmp, bpp; + u32 format; x0 = priv->crop_x; x1 = priv->crop_x + priv->crop_w - 1; @@ -277,15 +303,18 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr) clrsetbits_le32(regs + LTDC_L1CFBLR, LXCFBLR_CFBLL | LXCFBLR_CFBP, val); /* Pixel format */ - val = stm32_ltdc_get_pixel_format(priv->l2bpp); - clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, val); + format = stm32_ltdc_get_pixel_format(priv->l2bpp); + clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, format); /* Constant alpha value */ clrsetbits_le32(regs + LTDC_L1CACR, LXCACR_CONSTA, priv->alpha); + /* Specifies the blending factors : with or without pixel alpha */ + /* Manage hw-specific capabilities */ + val = has_alpha(format) ? BF1_PAXCA | BF2_1PAXCA : BF1_CA | BF2_1CA; + /* Blending factors */ - clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, - BF1_PAXCA | BF2_1PAXCA); + clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, val); /* Frame buffer line number */ clrsetbits_le32(regs + LTDC_L1CFBLNR, LXCFBLNR_CFBLN, priv->crop_h); |