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authorYe.Li <B37916@freescale.com>2015-05-13 11:35:50 +0800
committerMax Krummenacher <max.krummenacher@toradex.com>2016-03-09 14:42:34 +0100
commit143c9712af6a44bdaf123549d374d2d42c86f159 (patch)
tree2c94dadd2db03e6203119ce2013a8368767ad26c /drivers
parentc60c4f024e863b47e5c93a7ff62e88fb745d0e78 (diff)
MLK-10884 imx: MX6SX: Fix IOMUXC GPR registers access issue
The iomuxc structure has changed to add 0x4000 offset for i.MX6SX and UL, so when using this structure to access gpr registers needs to change the base address to IOMUXC_BASE_ADDR. Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/pcie_imx.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index b6d477ed58..497937e571 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -100,11 +100,7 @@
static void print_regs(int contain_pcie_reg)
{
u32 val;
-#ifndef CONFIG_MX6SX
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
-#else
- struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_GPR_BASE_ADDR;
-#endif
struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
val = readl(&iomuxc_regs->gpr[1]);
DBGF("GPR01 a:0x%08x v:0x%08x\n", (u32)&iomuxc_regs->gpr[1], val);